Power storage device control system, power storage system, and electrical appliance

ABSTRACT

Deterioration of a power storage device is reduced. Switches that control the connections of a plurality of power storage devices separately are provided. The switches are controlled with a plurality of control signals, so as to switch between charge and discharge of each of the power storage devices or between serial connection and parallel connection of the plurality of power storage devices. Further, a semiconductor circuit having a function of carrying out arithmetic is provided for the power storage devices, so that a control system of the power storage devices or a power storage system is constructed.

BACKGROUND OF THE INVENTION 1. Field of the Invention

The present invention relates to an object (a product including amachine, a manufacture, and a composition of matter) and a method (aprocess including a simple method and a production method). Inparticular, the present invention relates to a power storage device, acontrol system of a power storage device, a power storage system, anelectronic circuit, a semiconductor device, a display device, alight-emitting device, and an electrical appliance, and further to adriving method thereof and a manufacturing method thereof. Morespecifically, the present invention relates to a power storage device, acontrol system of a power storage device, a power storage system, anelectronic circuit, a semiconductor device, a display device, alight-emitting device, and an electrical appliance which include anoxide semiconductor, and father to a driving method thereof and amanufacturing method thereof.

2. Description of the Related Art

In recent years, various power storage devices such as secondarybatteries including lithium-ion secondary batteries and the like,lithium-ion capacitors, and air cells have been actively developed(e.g., Patent Document 1). In particular, demand for lithium-ionsecondary batteries with high output and high energy density has rapidlygrown with the development of the semiconductor industry, for electricalappliances, for example, portable information terminals such as mobilephones, smartphones, and laptop computers, portable music players, anddigital cameras; medical equipment; next-generation clean energyvehicles such as hybrid electric vehicles (HEVs), electric vehicles(EVs), and plug-in hybrid electric vehicles (PHEVs); and the like. Thelithium-ion secondary batteries are essential as rechargeable energysupply sources for today's information society.

As another example of the conventional power storage device, there is apower storage system in which a plurality of battery cells is connectedin series (e.g., Patent Document 2).

REFERENCE Patent Document [Patent Document 1] PCT InternationalPublication No. 10113268 [Patent Document 2] Japanese Published PatentApplication No. 2012-135154 SUMMARY OF THE INVENTION

The conventional power storage device has problems of a capacitydecrease and a resistance increase due to gradual deterioration byrepetitive charge and discharge.

For example, in the cam of a lithium-ion secondary battery, theresistance of a negative electrode may increase min a charge period. Oneof the reasons is that carrier ions from a positive electrode areprecipitated on a negative electrode when the potential of the negativeelectrode becomes below the allowable value.

In addition, in a conventional power storage device in which a pluralityof battery cells is connected in series, if there is a variation inresistance among the battery cells at the time of charge, the batterycells are charged with the voltage of the battery cell having thehighest resistance as a reference. Accordingly, all of the plurality ofbattery cells cannot be fully charged.

An object of one embodiment of the present invention is to reducedeterioration of a power storage device or the like.

An object of one embodiment of the present invention is to decrease thereduction in the capacity of a power storage device or the like due tocharge or discharge.

An object of one embodiment of the present invention is to increasecharge efficiency in a plurality of battery cells.

An object of one embodiment of the present invention is to control apower storage device or the like with low power.

An object of one embodiment of the present invention is to improve thereliability of a power storage device or the like.

An object of one embodiment of the present invention is to improve thesafety of a power storage device or the like.

An object of one embodiment of the present invention is to provide anovel control system of a power storage device, a novel power storagedevice, and the like. An object of one embodiment of the presentinvention is to provide an efficient control system of a power storagedevice, an efficient power storage device, and the like.

An object of one embodiment of the present invention is to provide ahighly reliable semiconductor device or the like.

In particular, one embodiment of the present invention can achieve atleast one of the objects set forth above, in some cases. Note that oneembodiment of the present invention does not necessarily achieve all theobjects set forth above. If an object is not described above butapparent from the description of the specification, drawings, the scopeof claims, and the like, the object can be regarded as it is.

The present inventors have hit upon an idea of providing switches thatcontrol the connections of a plurality of power storage devicesseparately in order to switch between charge and discharge of each powerstorage device or between serial connection and parallel connection ofthe plurality of power storage devices.

Further, the present inventors have hit upon an idea of incorporating acontrol circuit in the power storage devices to construct a controlsystem of the power storage devices or a power storage system.

One embodiment of the present invention is a control system of a powerstorage device configured to control charge and discharge of at least afirst power storage element, a second power storage element, a thirdpower storage element, and a fourth power storage element. The controlsystem includes a pair of first switches, a pair of second switches, apair of third switches, a pair of fourth switches, a fifth switch, anencoder, a semiconductor circuit, a pair of first connection terminalscapable of being electrically connected to a power supply, and a pair ofsecond connection terminals capable of being electrically connected to aload. The pair of first switches have a function of determining, basedon a first control signal, to which connection terminal the first powerstorage element is electrically connected to, the pair of firstconnection terminals or one of the pair of second connection terminals.The pair of second switches have a function of determining, based on asecond control signal, to which connection terminal the second powerstorage element is electrically connected to, the pair of firstconnection terminals or one of the pair of second connection terminals.The pair of third switches have a function of determining, based on athird control signal, to which connection terminal the third powerstorage element is electrically connected to, the pair of firstconnection terminals or the pair of second connection terminals. Thepair of fourth switches have a function of determining, based on afourth control signal, to which connection terminal the fourth powerstorage element is electrically connected to, the pair of firstconnection terminals or the pair of second connection terminals. Thefifth switch has a function of determining, based on one of the first tofourth control signals, whether to electrically and serially connect atleast one of the first power storage element and the second powerstorage element to at least one of the third power storage element andthe second power storage element. The encoder has a function of encodinga plurality of inputted data signals to generate and output at least thefirst control signal, the second control signal, the third controlsignal, and the fourth control signal. The semiconductor circuit has afunction of outputting data of instruction to charge or discharge thefirst power storage element, the second power storage element, the thirdpower storage element, and the fourth power storage element, as theplurality of data signals.

In the above-described control system of a power storage device, thesemiconductor circuit may include a processor, a memory electricallyconnected to the processor, and a controller electrically connected tothe processor and the memory. The processor may include a register, andthe register may include a first memory circuit having a function ofretaining data for a period in which power is supplied to the processorand a second memory circuit having a function of retaining data for aperiod in which power supply to the processor is stopped. The secondmemory circuit may include a transistor having a function of controllingwriting and retention of data, and the transistor may have an off-statecurrent of 100 zA or lower per micrometer of channel width.

One embodiment of the present invention is a power storage system thatincludes the above-described control system and the first to fourthpower storage elements.

One embodiment of the present invention is an electrical applianceincluding the above-described power storage system.

The reduction in the capacity of a power storage device due to chargecan be decreased. The control of a power storage device can be performedwith low power. The reliability of a power storage device can beimproved. The safety of a power storage device can be improved. A novelpower storage device can be provided. An efficient power storage devicecan be provided. The efficiency of charging a plurality of power storagedevices can be increased.

A highly reliable semiconductor device can be provided.

BRIEF DESCRIPTION OF THE DRAWINGS

In the accompanying drawings:

FIG. 1 shows a power storage system;

FIG. 2 shows a power storage system;

FIG. 3 shows a power storage system;

FIG. 4 shows a power storage system;

FIG. 5 shows a power storage system;

FIG. 6 shows a power storage system;

FIG. 7 shows a power storage system;

FIG. 8 shows a switch;

FIG. 9 shows a semiconductor circuit;

FIGS. 10A and 10B show registers;

FIG. 11 shows a memory;

FIGS. 12A and 12B show a memory;

FIG. 13 shows a memory;

FIGS. 14A and 14B show a memory;

FIGS. 15A to 15C show a structural example of a transistor;

FIGS. 16A and 16B show structural examples of a transistor;

FIGS. 17A and 17B show a positive electrode;

FIGS. 18A and 18B show a negative electrode;

FIGS. 19A to 19C show power storage devices;

FIGS. 20A and 20B show a power storage device;

FIGS. 21A and 21B show a power storage system;

FIG. 22 shows a power storage system;

FIGS. 23A to 23C show electrical appliances;

FIGS. 24A to 24C show an electrical appliance; and

FIG. 25 shows an electrical appliance.

DETAILED DESCRIPTION OF THE INVENTION

Embodiments of the present invention will be described in detail belowwith reference to the drawings.

However, the present invention is not limited to the description of theembodiments, and it is easily understood by those skilled in the artthat the modes can be modified in various ways. Therefore, the inventionshould not be construed as being limited to the description in thefollowing embodiments.

Note that in drawings used in this specification, the thicknesses offilms, layers, and substrates and the sizes of components (e.g., thesizes of regions) are exaggerated for simplicity in some cases.Therefore, the sizes of the components are not limited to those in thedrawings and relative sizes between the components in the drawings.

Note that the ordinal numbers such as “first” and “second” in thisspecification and the like are used for convenience and do not denotethe order of steps, the stacking order of layers, or the like. Inaddition, the ordinal numbers in this specification and the like do notdenote particular names which specify the present invention.

Note that in the structures of the present invention described in thisspecification and the like, the same portions or portions having similarfunctions in different drawings are denoted by the same referencenumerals, and description of such portions is not repeated. Further, thesame hatching pattern is applied to portions having similar functions,and the portions are not especially denoted by reference numerals insome cases.

Note that a resist mask or the like might be reduced in sizeunintentionally owing to treatment such as etching in an actualmanufacturing process; however, the reduction is not shown in thedrawings in some cases for easy understanding.

Note that the term such as “over” or “below” in this specification andthe like does not necessarily mean that a component is placed “directlyon” or “directly under” another component. For example, the expression“a gate electrode over a gate insulating layer” can mean the case wherethere is an additional component between the gate insulating layer andthe gate electrode.

Note that a voltage refers to a potential difference between a certainpotential and a reference potential (e.g., a ground potential (GND) or asource potential) in many cases. Accordingly, a voltage can also becalled a potential.

In addition, in this specification and the like, the term such as“electrode” or “wiring” does not limit the function of the componentitself. For example, an “electrode” is sometimes a part of a “wiring”,and vice versa. Furthermore, the term “electrode” or “wiring” caninclude the case where a plurality of “electrodes” or “wirings” isformed in an integrated manner.

Functions of a “source” and a “drain” are sometimes replaced with eachother when a transistor of opposite polarity is used or when thedirection of current flowing is changed in circuit operation, forexample. Therefore, the terms “source” and “drain” can be replaced witheach other in this specification and the like.

In this specification and the like, a connection includes an electricalconnection, a functional connection, and a direct connection. Aconnection relation of components described in embodiments is notlimited to the connection relation illustrated in the drawings anddescribed in the specification.

Note that in this specification and the like, it might be possible forthose skilled in the art to constitute one embodiment of the inventioneven when portions to which all the terminals of an active element(e.g., a transistor or a diode), a passive element (e.g., a capacitor ora resistor), or the like are connected are not specified. In otherwords, even when such portions are not specified, one embodiment of theinvention can be clear and it can be determined that one embodiment ofthe invention is disclosed in this specification and the like, in somecases. In particular, in the case where there are several possibleportions to which a terminal can be connected, it is not necessary tospecify all the portions to which the terminal is connected. Thus, itmight be possible to constitute one embodiment of the invention byspecifying only portions to which some of terminals of an active element(e.g., a transistor or a diode), a passive element (e.g., a capacitor ora resistor), or the like are connected.

Note that in this specification and the like, it might be possible forthose skilled in the art to specify the invention when at leastconnection portions of a circuit are specified. Alternatively it mightbe possible for those skilled in the art to specify the invention whenat least a function of a circuit is specified. In other words, when afunction of a circuit is specified, one embodiment of the presentinvention can be clear and it can be determined that one embodiment ofthe invention is disclosed in this specification and the like, in somecases. Thus, when not a function but connection portions of a circuitare specified, the circuit is disclosed as one embodiment of theinvention, and one embodiment of the invention can be constituted.Alternatively, when not connection portions but a function of a circuitis specified, the circuit is disclosed as one embodiment of theinvention, and one embodiment of the invention can be constituted.

Note that in this specification and the like, a positive electrode and anegative electrode for a secondary battery may be collectively referredto as electrodes; the electrode in this case refers to at least one ofthe positive electrode and the negative electrode.

Note that in this specification and the like, a charging rate C refersto the rate at which a secondary battery is charged. For example, thecharging rate in the case of charging a battery having a capacity of 1Ah with 1 A is 1 C. In addition, a discharging rate C refers to the rateat which a secondary battery is discharged. For example, the dischargingrate in the case of discharging a battery having a capacity of 1 Ah with1 A is 1 C.

Contents described in Detailed Description of the Invention can becombined as appropriate.

Embodiment 1. Power Storage System

Examples of a power storage device and a power storage system will bedescribed.

[1.1. Configuration]

A circuit configuration example of a power storage system will bedescribed with reference to FIG. 1.

The power storage system illustrated in FIG. 1 includes a power storageelement 10_1, a power storage element 10_2, a power storage element20_1, a power storage element 20_2, a pair of switches 11 (a switch 11 aand a switch 11 b), a pair of switches 12 (a switch 12 a and a switch 12b), a pair of switches 21 (a switch 21 a and a switch 21 b), a pair ofswitches 22 (a switch 22 a and a switch 22 b), a switch 51, and a switch61.

For example, the switch 11 a and the switch 11 b has a function ofdetermining to which connection terminal the power storage element 10_1is connected to, a pair of connection terminals 71 (a connectionterminal 71 a and a connection terminal 71 b) or a connection terminal72 a. Alternatively, for example, the switch 11 a has a function ofdetermining whether to connect the power storage element 10_1 to thepair of connection terminals 71 (the connection terminal 71 a).Alternatively, for example, the switch 11 a has a function ofdetermining whether to connect the power storage element 10_1 to theconnection terminal 72 a. Similarly, for example, the switch 11 b has afunction of determining whether to connect the power storage element10_1 to the pair of connection terminals 71 (the connection terminal 71b). Alternatively, for example, the switch 11 b has a function ofdetermining whether to connect the power storage element 10_1 to theconnection terminal 72 a. Alternatively, for example, the switch 11 ahas a function of preventing the power storage element 10_1 fromconnecting to any terminal. Similarly, for example, the switch 11 b hasa function of preventing the power storage element 10_1 from connectingto any terminal.

The connection terminal 71 a and the connection terminal 71 b amterminals that can be connected to a power supply, for example.

The connection terminal 72 a and the connection terminal 72 b weterminals that can be connected to a load, for example.

For example, the switch 12 a and the switch 12 b have a function ofdetermining to which connection terminal the power storage element 10_2is connected to, the connection terminals 71 a and 71 b or theconnection terminal 72 a.

For example, the switch 21 a and the switch 21 b have a function ofdetermining to which connection terminal the power storage element 20_1is connected to, the connection terminals 71 a and 71 b or theconnection terminals 72 a and 72 b. Alternatively, for example, theswitch 21 a has a function of determining whether to connect the powerstorage element 20_1 to the connection terminal 71 a. Alternatively, forexample, the switch 21 a has a function of determining whether toconnect the power storage element 20_1 to the connection terminal 72 a.Similarly, for example, the switch 21 b has a function of determiningwhether to connect the power storage element 20_1 to the connectionterminal 71 b. Alternatively, for example, the switch 21 b has afunction of determining whether to connect the power storage element20_1 to the connection terminal 72 b. Alternatively, for example, theswitch 21 a has a function of preventing the power storage element 20_1from connecting to any terminal. Similarly, for example, the switch 21 bhas a function of preventing the power storage element 20_1 fromconnecting to any terminal.

For example, the switch 22 a and the switch 22 b have a function ofdetermining to which connection terminal the power storage element 20_2is connected to, the connection terminals 71 a and 71 b or theconnection terminals 72 a and 72 b. Alternatively, for example, theswitch 22 a has a function of determining whether to connect the powerstorage element 20_2 to the connection terminal 71 a. Alternatively, forexample, the switch 22 a has a function of determining whether toconnect the power storage element 20_2 to the connection terminal 72 a.Similarly, for example, the switch 22 b has a function of determiningwhether to connect the power storage element 20_2 to the connectionterminal 71 b. Alternatively, for example, the switch 22 b has afunction of determining whether to connect the power storage element20_2 to the connection terminal 72 a. Alternatively, for example, theswitch 22 a has a function of preventing the power storage element 20_2from connecting to any terminal. Similarly, for example, the switch 22 bhas a function of preventing the power storage element 20_2 fromconnecting to any terminal.

Note that phrases “a switch connects A to B” and “a switch does notconnect A to B” are used to refer to the state in which A and B are in aconducting state and the state in which A and B are out of a conductingstate, respectively, in some cases. Further, the phrases “a switchconnects A to B” and “a switch does not connect A to B” are used torefer to the state of the switch being in a conducting state (on state)and in a non-conducting state (off state), respectively, in some cases.

The switch 51 has a function of determining whether to serially connectat least one of the power storage elements 10_1 and 10_2 to at least oneof the power storage elements 20_1 and 20_2.

The switch 61 has a function of determining whether to serially connectat least one of the power storage elements 10_1 and 10_2 to at least oneof the power storage elements 20_1 and 20_2.

Note that the number of power storage elements and switches is notlimited to that shown in FIG. 1. For example, as shown in FIG. 2, thenumber of power storage elements and switches may be increased; also inthis case, switches are provided for each of a plurality of powerstorage elements. A configuration of a power storage system shown inFIG. 2 will be described below. The description of the configurationshown in FIG. 1 can be referred to as appropriate for the configurationof FIG. 2, and vice versa.

The power storage system shown in FIG. 2 includes a power storageelements 10_1 to a power storage element 10_3, a power storage element20_1 to a power storage element 20_3, a power storage element 30_1 to apower storage element 30_3, a pair of switches 11 (a switch 11 a and aswitch 11 b), a pair of switches 12 (a switch 12 a and a switch 12 b), apair of switches 13 (a switch 13 a and a switch 13 b), a pair ofswitches 21 (a switch 21 a and a switch 21 b), a pair of switches 22 (aswitch 22 a and a switch 22 b), a pair of switches 23 (a switch 23 a anda switch 23 b), a pair of switches 31 (a switch 31 a and a switch 31 b),a pair of switches 32 (a switch 32 a and a switch 32 b), a pair ofswitches 33 (a switch 33 a and a switch 33 b), a switch 51, a switch 52,a switch 61, a switch 62, a pair of connection terminals 71 (aconnection terminal 71 a and a connection terminal 71 b), and a pair ofconnection terminals 72 (a connection terminal 72 a and a connectionterminal 72 b).

The power storage element 10_1 to the power storage element 10_3 areprovided in a cell 100_1. The power storage element 20_1 to the powerstorage element 20_3 are provided in a cell 100_2. The power storageelement 30_1 to the power storage element 30_3 are provided in a cell100_3. The power storage elements are each an element including at leasta pair of electrodes and an electrolyte and having a function of storingpower. Note that the power storage elements may be used as power storagedevices. Alternatively, one cell may be used as one power storage deviceor battery cell. Alternatively, one cell may be used as one assembledbattery.

As the power storage elements 10_1 to 10_3, the power storage elements20_1 to 20_3, and the power storage elements 30_1 to 30_3, secondarybatteries such as a lithium-ion secondary battery, a lead storagebattery, a lithium-ion polymer secondary battery, a nickel-metal hydridebattery, a nickel-cadmium battery, a nickel-iron battery, a nickel-zincbattery, and a zinc-silver oxide battery; secondary flow batteries suchas a redox flow battery, a zinc-chlorine battery, and a zine-bromidebattery; mechanically rechargeable secondary batteries such as analuminum-air battery, a zinc-air battery, and an iron-air battery; andhigh-operating-temperature secondary batteries such as a sodium-sulfurbattery and a lithium-iron sulfide battery; and the like can be used,for example. However, without being limited to these secondarybatteries, the power storage elements 10_1 to 10_3, the power storageelements 20_1 to 20_3, and the power storage elements 30_1 to 30_3 mayhave other structures using a lithium-ion capacitor or the like, forexample.

The switch 11 a, the switch 11 b, the switch 12 a, the switch 12 b, theswitch 13 a, the switch 13 b, the switch 21 a, the switch 21 b, theswitch 22 a, the switch 22 b, the switch 23 a, the switch 23 b, theswitch 31 a, the switch 31 b, the switch 32 a, the switch 32 b, theswitch 33 a, and the switch 33 b each have at least three terminals (afirst terminal, a second terminal, and a third terminal). For example,the switches having three terminals may be formed using a plurality oftransistors. Alternatively, the switches having three terminals may beformed using microelectromechanical systems (also referred to as MEMS).Alternatively, the switches having three terminals may be otherelectrical switches or mechanical switches.

The first terminal of the switch 11 a is connected to a positiveelectrode of the power storage element 10_1, the second terminal of theswitch 11 a is connected to the connection terminal 71 a, and the thirdterminal of the switch 11 a is connected to the third terminal of theswitch 12 a, the third terminal of the switch 13 a, and the connectionterminal 72 a.

The first terminal of the switch 11 b is connected to a negativeelectrode of the power storage element 10_1, the second terminal of theswitch 11 b is connected to the connection terminal 71 b, and the thirdterminal of the switch 11 b is connected to the third terminal of theswitch 12 b and the third terminal of the switch 13 b.

For example, the switch 11 a and the switch 11 b have a function ofdetermining to which connection terminal the power storage element 10_1is connected to, the connection terminals 71 a and 71 b or theconnection terminal 72 a.

The first terminal of the switch 12 a is connected to a positiveelectrode of the power storage element 10_2, the second terminal of theswitch 12 a is connected to the connection terminal 71 a, and the thirdterminal of the switch 12 a is connected to the third terminal of theswitch 11 a, the third terminal of the switch 13 a, and the connectionterminal 72 a.

The first terminal of the switch 12 b is connected to a negativeelectrode of the power storage element 10_2, the second terminal of theswitch 12 b is connected to the connection terminal 71 b, and the thirdterminal of the switch 12 b is connected to the third terminal of theswitch 11 b and the third terminal of the switch 13 b.

For example, the switch 12 a and the switch 12 b have a function ofdetermining to which connection terminal the power storage element 10_2is connected to, the connection terminals 71 a and 71 b or theconnection terminal 72 a.

The first terminal of the switch 13 a is connected to a positiveelectrode of the power storage element 10_3, the second terminal of theswitch 13 a is connected to the connection terminal 71 a, and the thirdterminal of the switch 13 a is connected to the third terminal of theswitch 11 a, the third terminal of the switch 12 a, and the connectionterminal 72 a.

The first terminal of the switch 13 b is connected to a negativeelectrode of the power storage element 10_3, the second terminal of theswitch 13 b is connected to the connection terminal 71 b, and the thirdterminal of the switch 13 b is connected to the third terminal of theswitch 11 b and the third terminal of the switch 12 b.

For example, the switch 13 a and the switch 13 b have a function ofdetermining to which connection terminal the power storage element 10_3is connected to, the connection terminals 71 a and 71 b or theconnection terminal 72 a.

The first terminal of the switch 21 a is connected to a positiveelectrode of the power storage element 20_1, the second terminal of theswitch 21 a is connected to the connection terminal 71 a, and the thirdterminal of the switch 21 a is connected to the third terminal of theswitch 22 a, the third terminal of the switch 23 a, and the connectionterminal 72 a.

The first terminal of the switch 21 b is connected to a negativeelectrode of the power storage element 20_1, the second terminal of theswitch 21 b is connected to the connection terminal 71 b, and the thirdterminal of the switch 21 b is connected to the third terminal of theswitch 22 b and the third terminal of the switch 23 b.

For example, the switch 21 a and the switch 21 b have a function ofdetermining to which connection terminal the power storage element 20_1is connected to, the connection terminals 71 a and 71 b or theconnection terminal 72 a.

The first terminal of the switch 22 a is connected to a positiveelectrode of the power storage element 20_2, the second terminal of theswitch 22 a is connected to the connection terminal 71 a, and the thirdterminal of the switch 22 a is connected to the third terminal of theswitch 21 a, the third terminal of the switch 23 a, and the connectionterminal 72 a.

The first terminal of the switch 22 b is connected to a negativeelectrode of the power storage element 20_2, the second terminal of theswitch 22 b is connected to the connection terminal 71 b, and the thirdterminal of the switch 22 b is connected to the third terminal of theswitch 21 b and the third terminal of the switch 23 b.

For example, the switch 22 a and the switch 22 b have a function ofdetermining to which connection terminal the power storage element 20_2is connected to, the connection terminals 71 a and 71 b or theconnection terminal 72 a.

The first terminal of the switch 23 a is connected to a positiveelectrode of the power storage element 20_3, the second terminal of theswitch 23 a is connected to the connection terminal 71 a, and the thirdterminal of the switch 23 a is connected to the third terminal of theswitch 21 a, the third terminal of the switch 22 a, and the connectionterminal 72 a.

The first terminal of the switch 23 b is connected to a negativeelectrode of the power storage element 20_3, the second terminal of theswitch 23 b is connected to the connection terminal 71 b, and the thirdterminal of the switch 23 b is connected to the third terminal of theswitch 21 b and the third terminal of the switch 22 b.

For example, the switch 23 a and the switch 23 b have a function ofdetermining to which connection terminal the power storage element 20_3is connected to, the connection terminals 71 a and 71 b or theconnection terminal 72 a.

The first terminal of the switch 31 a is connected to a positiveelectrode of the power storage element 30_1, the second terminal of theswitch 31 a is connected to the connection terminal 71 a, and the thirdterminal of the switch 31 a is connected to the third terminal of theswitch 32 a, the third terminal of the switch 33 a, and the connectionterminal 72 a.

The first terminal of the switch 31 b is connected to a negativeelectrode of the power storage element 30_1, the second terminal of theswitch 31 b is connected to the connection terminal 71 b, and the thirdterminal of the switch 31 b is connected to the third terminal of theswitch 32 b, the third terminal of the switch 33 b, and the connectionterminal 72 b.

For example, the switch 31 a and the switch 31 b have a function ofdetermining to which connection terminal the power storage element 30_1is connected to, the connection terminals 71 a and 71 b or theconnection terminals 72 a and 72 b.

The first terminal of the switch 32 a is connected to a positiveelectrode of the power storage element 30_2, the second terminal of theswitch 32 a is connected to the connection terminal 71 a, and the thirdterminal of the switch 32 a is connected to the third terminal of theswitch 31 a, the third terminal of the switch 33 a, and the connectionterminal 72 a.

The first terminal of the switch 32 b is connected to a negativeelectrode of the power storage element 30_2, the second terminal of theswitch 32 b is connected to the connection terminal 71 b, and the thirdterminal of the switch 32 b is connected to the third terminal of theswitch 31 b, the third terminal of the switch 33 b, and the connectionterminal 72 b.

For example, the switch 32 a and the switch 32 b have a function ofdetermining to which connection terminal the power storage element 30_2is connected to, the connection terminals 71 a and 71 b or theconnection terminals 72 a and 72 b.

The first terminal of the switch 33 a is connected to a positiveelectrode of the power storage element 30_3, the second terminal of theswitch 33 a is connected to the connection terminal 71 a, and the thirdterminal of the switch 33 a is connected to the third terminal of theswitch 31 a, the third terminal of the switch 32 a, and the connectionterminal 72 a.

The first terminal of the switch 33 b is connected to a negativeelectrode of the power storage element 30_3, the second terminal of theswitch 33 b is connected to the connection terminal 71 b, and the thirdterminal of the switch 33 b is connected to the third terminal of theswitch 31 b, the third terminal of the switch 32 b, and the connectionterminal 72 b.

For example, the switch 33 a and the switch 33 b have a function ofdetermining to which connection terminal the power storage element 30_3is connected to, the connection terminals 71 a and 71 b or theconnection terminals 72 a and 72 b.

The switch 51 and the switch 52 each have at least two terminals (afirst terminal and a second terminal). For example, the switches havingtwo terminals may be formed using transistors. Alternatively, theswitches having two terminals may be formed using microelectromechanicalsystems or the like.

The first terminal of the switch 51 is connected to the third terminalsof the switches 11 b to 13 b, and the second terminal of the switch 51is connected to the third terminals of the switches 21 a to 23 a.

The switch 51 has a function of determining whether to serially connectat least one of the power storage elements 10_1 to 10_3 to at least oneof the power storage elements 20_1 to 30_3.

The first terminal of the switch 52 is connected to the third terminalsof the switches 21 b to 23 b, and the second terminal of the switch 52is connected to the third terminals of the switches 31 a to 33 a.

The switch 52 has a function of determining whether to serially connectat least one of the power storage elements 20_1 to 20_3 to at least oneof the power storage elements 30_1 to 30_3.

The switch 61 and the switch 62 each have at least two terminals (afirst terminal and a second terminal). For example, the switches havingtwo terminals may be formed using transistors. Alternatively, theswitches having two terminals may be formed using microelectromechanicalsystems or the like.

The first terminal of the switch 61 is connected to the connectionterminal 72 a, and the second terminal of the switch 61 is connected tothe third terminals of the switches 21 a to 23 a.

The switch 61 has a function of determining whether to connect theconnection terminal 72 a to at least one of the power storage elements20_1 to 20_3.

The first terminal of the switch 62 is connected to the connectionterminal 72 a, and the second terminal of the switch 62 is connected tothe third terminals of the switches 31 a to 33 a.

The switch 62 has a function of determining whether to connect theconnection terminal 72 a to at least one of the power storage elements30_1 to 30_3.

Note that as an example, an example of providing a plurality of powerstorage elements has been described; however, an embodiment of thepresent invention is not limited to this example. Depending onconditions or cases, the power storage elements are not necessarilyprovided.

[1.2. Driving Method]

Next, examples of a method for driving the power storage system shown inFIG. 2 will be described with reference to FIG. 3, FIG. 4, FIG. 5, andFIG. 6. For simplicity, the case where the connection terminal 71 a andthe connection terminal 71 b are connected to a power source 91 and theconnection terminal 72 a and the connection terminal 72 b are connectedto a load 92 is described with reference to FIG. 3, FIG. 4, FIG. 5, andFIG. 6.

[1.2.1. Driving Method 1]

An example of the driving method during charge and discharge will bedescribed with reference to FIG. 3 and FIG. 4.

In charging the power storage elements 10_1 to 10_3, the power storageelements 20_1 to 20_3, and the power storage elements 30_1 to 30_3, asshown in FIG. 3, the switches 11 a to 13 a, the switches 11 b to 13 b,the switches 21 a to 23 a, the switches 21 b to 23 b, the switches 31 ato 33 a, and the switches 31 b to 33 b are set so that the power storageelements 10_1 to 10_3, the power storage elements 20_1 to 20_3, thepower storage elements 30_1 to 30_3, and the power source 91 areconnected in parallel. In addition, the switch 51 and the switch 52 areoff. Note that the switch 61 and the switch 62 may be either on or off.

At this time, the power storage elements 10_1 to 10_3, the power storageelements 20_1 to 20_3, and the power storage elements 30_1 to 30_3 areeach charged. Since the power storage elements 10_1 to 10_3, the powerstorage elements 20_1 to 20_3, and the power storage elements 30_1 to30_3 are connected in parallel, charging can be carried out on the powerstorage element basis. In the case of charging a power storage deviceincluding a plurality of series-connected power storage elements, ifthere is a variation in resistance among the power storage elements, thepower storage elements are charged with the voltage of the power storageelement having the highest resistance as a reference and all of thepower storage elements cannot be fully charged; however, the drivingmethod of this embodiment does not cause this problem. Accordingly, ahigher degree of safety can be achieved in the power storage elements.

In discharging the power storage elements 10_1 to 10_3, the powerstorage elements 20_1 to 20_3, and the power storage elements 30_1 to30_3, as shown in FIG. 4, the switch 51 and the switch 52 are on, andthe switch 61 and the switch 62 are off. Further, the switches 11 a to13 a, the switches 11 b to 13 b, the switches 21 a to 23 a, the switches21 b to 23 b, the switches 31 a to 33 a, and the switches 31 b to 33 bare set so that the power storage elements 10_1 to 10_3, the powerstorage elements 20_1 to 20_3, the power storage elements 30_1 to 30_3,and the load 92 are connected in series.

At this time, the power storage elements 10_1 to 10_3, the power storageelements 20_1 to 20_3, and the power storage elements 30_1 to 30_3 areeach discharged, and a current flows through the load 92. Since thepower storage elements 10_1 to 10_3, the power storage elements 20_1 to20_3, and the power storage elements 30_1 to 30_3 are connected inseries, a large amount of current can be supplied to the load 92.

[1.2.2. Driving Method 2]

Although all the power storage elements are discharged in the drivingmethod described with reference to FIG. 4, an embodiment of the presentinvention is not limited to this example, and a method in which onlypart of the power storage elements are discharged may be employed.

For example, as shown in FIG. 5, the switch 51 is off, the switch 52 ison, the switch 61 is on, and the switch 62 is off. In addition, theswitches 11 a to 13 a, the switches 11 b to 13 b, the switches 21 a to23 a, and the switches 21 b to 23 b may be set so that the power storageelements 10_1 to 10_3 are not discharged, and the switches 31 a to 33 aand the switches 31 b to 33 b may be set so that the power storageelements 20_1 to 20_3 and the power storage elements 30_1 to 30_3 areelectrically connected in series and discharged. In this manner, thecurrent flowing through the load 92 can be changed as appropriatewithout a voltage conversion circuit such as a converter.

[1.2.3. Driving Method 3]

Although all the power storage elements are charged and discharged inthe driving method described with reference to FIG. 3 and FIG. 4, anembodiment of the present invention is not limited to this example, anda method in which part of the power storage elements are charged and therest of the power storage elements are discharged may be employed.

For example, as shown in FIG. 6, the switch 12 a and the switch 12 b areset so that the power storage element 10_2 and the power source 91 areconnected in parallel, the switch 22 a and the switch 22 b are set sothat the power storage element 20_2 and the power source 91 areconnected in parallel, and the switch 32 a and the switch 32 b are setso that the power storage element 30_2 and the power source 91 areconnected in parallel; thus, the power storage element 10_2, the powerstorage element 20_2, and the power storage element 30_2 are charged.The switch 51 and the switch 52 are on, and the switch 61 and the switch62 are off. Further, the switch 11 a, the switch 11 b, the switch 13 a,the switch 13 b, the switch 21 a, the switch 21 b, the switch 23 a, theswitch 23 b, the switch 31 a, the switch 31 b, the switch 33 a, and theswitch 33 b may be set so that the power storage element 10_1, the powerstorage element 10_3, the power storage element 20_1, the power storageelement 20_3, the power storage element 30_1, the power storage element30_3, and the load 92 are connected in series; thus, the power storageelement 10_1, the power storage element 10_3, the power storage element20_1, the power storage element 20_3, the power storage element 30_1,and the power storage element 30_3 are discharged. Note that the chargedpower storage elements are not limited to the power storage element10_2, the power storage element 20_2, and the power storage element30_2. For example, the power storage elements may be charged in order byswitching the switches 11 a to 13 a, the switches 11 b to 13 b, theswitches 21 a to 23 a, the switches 21 b to 23 b, the switches 31 a to33 a, and the switches 31 b to 33 b.

As described with reference to FIG. 6, part of power storage elementscan be charged while the rest of the power storage elements aredischarged. Accordingly, an operation stop period for charging is notnecessary in the power storage system, leading to high-speed operation.

Embodiment 2. Power Storage Device Control System

An example of a control system of a power storage device that can beused in a power storage system of one embodiment of the presentinvention will be described. Note that the description of the powerstorage system with reference to FIG. 1 to FIG. 6 can be referred to forthe same portion, as appropriate.

[2.1. Configuration]

An example of a control system of a power storage device will bedescribed with reference to FIG. 7.

A circuit 200 shown in FIG. 7 includes a pair of switches 11 (a switch11 a and a switch 11 b), a pair of switches 12 (a switch 12 a and aswitch 12 b), a pair of switches 21 (a switch 21 a and a switch 21 b), apair of switches 22 (a switch 22 a and a switch 22 b), a switch 51, aswitch 61, an encoder 240, a current detection circuit 245, asemiconductor circuit 246, a pair of connection terminals 201 (aconnection terminal 201 a and a connection terminal 201 b), a pair ofconnection terminals 202 (a connection terminal 202 a and a connectionterminal 202 b), a pair of connection terminals 203 (a connectionterminal 203 a and a connection terminal 203 b), a pair of connectionterminals 204 (a connection terminal 204 a and a connection terminal 204b), a pair of connection terminals 71 (a connection terminal 71 a and aconnection terminal 71 b), and a pair of connection terminals 72 (aconnection terminal 72 a and a connection terminal 72 b). Note that thecircuit 200 may be a control system, a controller, or a circuitsubstrate. The circuit 200, the power storage element 10_1, the powerstorage element 10_2, the power storage element 20_1, and the powerstorage element 20_2 form a power storage system in combination.Further, the circuit 200 may be connected to a power supply via theconnection terminal 71 a and the connection terminal 71 b. Further, thecircuit 200 may be connected to a load via the connection terminal 72 aand the connection terminal 72 b. Note that a power supply voltage(VDD-VSS) may be generated using a voltage output to the load and theninput to the circuit 200. Note that although an example in which thecircuit 200 controls four power storage elements is described here, anembodiment of the present invention is not limited to this example. Forexample, the number of power storage elements may be more than four asshown in FIG. 2.

A specific example of each of the switch 11 a, the switch 11 b, theswitch 12 a, the switch 12 b, the switch 21 a, the switch 21 b, theswitch 22 a, and the switch 22 b is shown in FIG. 8.

The switch shown in FIG. 8 includes three input-output terminals(input-output terminals IOa to IOc) and two control terminals (controlterminals CTL_1 and CTL_2).

Further, the switch shown in FIG. 8 includes a transistor 251 and atransistor 252.

One of a source and a drain of the transistor 251 is connected to theinput-output terminal IOa, and the other is connected to theinput-output terminal IOb. A gate of the transistor 251 is electricallyconnected to the control terminal CTL_1.

One of a source and a drain of the transistor 252 is connected to theinput-output terminal IOa, and the other is connected to theinput-output terminal IOc. A gate of the transistor 252 is electricallyconnected to the control terminal CTL_2.

In the switch shown in FIG. 8, the connection between the input-outputterminal IOa and the input-output terminal IOb or the connection betweenthe input-output terminal IOa and the input-output terminal IOc isselected by controlling the conduction state between the source and thedrain of the transistor 251 and the conduction state between the sourceand the drain of the transistor 252 in accordance with a control signal.

Note that both the transistor 251 and the transistor 252 can be set inan off state by controlling the potential of the control terminal CTL_1and the potential of the control terminal CTL_2.

Note that a transistor having a different polarity from that of thetransistor 251 may be connected in parallel to the transistor 251 toform a CMOS structure. Similarly, a transistor having a differentpolarity from that of the transistor 252 may be connected in parallel tothe transistor 252 to form a CMOS structure.

That is the specific example of the switches.

A control signal CTL1 is input from the encoder 240 to the controlterminal CTL_1 of the switch 11 a and the control terminal CTL_1 of theswitch 11 b. An inversion signal of the control signal CTL1 is inputfrom the inverter 241_1 to the control terminal CTL_2 of the switch 11 aand the control terminal CTL_2 of the switch 11 b.

The input-output terminal IOa of the switch 11 a is connected to theconnection terminal 201 a. Thus, the input-output terminal IOa of theswitch 11 a can be connected to the positive electrode of the powerstorage element 10_1 via the connection terminal 201 a. The input-outputterminal IOb of the switch 11 a is connected to the connection terminal71 a, and the input-output terminal IOc of the switch 11 a is connectedto the connection terminal 72 a via a resistor 244.

The input-output terminal IOa of the switch 11 b is connected to theconnection terminal 201 b. Accordingly, the input-output terminal IOa ofthe switch 11 b can be connected to the negative electrode of the powerstorage element 10_1 via the connection terminal 201 b. The input-outputterminal IOb of the switch 11 b is connected to the connection terminal71 b, and the input-output terminal IOc of the switch 11 b is connectedto one of a source and a drain of a transistor included in the switch51.

A control signal CTL2 is input from the encoder 240 to the controlterminal CTL_1 of the switch 12 a and the control terminal CTL_1 of theswitch 12 b. An inversion signal of the control signal CTL2 is inputfrom the inverter 241_2 to the control terminal CTL_2 of the switch 12 aand the control terminal CTL_2 of the switch 12 b.

The input-output terminal IOa of the switch 12 a is connected to theconnection terminal 202 a. Accordingly, the input-output terminal IOa ofthe switch 12 a can be connected to the positive electrode of the powerstorage element 10_2 via the connection terminal 202 a. The input-outputterminal IOb of the switch 12 a is connected to the connection terminal71 a, and the input-output terminal IOc of the switch 12 a is connectedto the connection terminal 72 a via the resistor 244.

The input-output terminal IOa of the switch 12 b is connected to theconnection terminal 202 b. Accordingly, the input-output terminal IOa ofthe switch 12 b can be connected to the negative electrode of the powerstorage element 102 via the connection terminal 202 b. The input-outputterminal IOb of the switch 12 b is connected to the connection terminal71 b, and the input-output terminal IOc of the switch 12 b is connectedto one of a source and a drain of a transistor included in the switch51.

A control signal CTL3 is input from the encoder 240 to the controlterminal CTL_1 of the switch 21 a and the control terminal CTL_1 of theswitch 21 b. An inversion signal of the control signal CTL3 is inputfrom the inverter 241_3 to the control terminal CTL_2 of the switch 21 aand the control terminal CTL_2 of the switch 21 b.

The input-output terminal IOa of the switch 21 a is connected to theconnection terminal 203 a. Thus, the input-output terminal IOa of theswitch 21 a can be connected to the positive electrode of the powerstorage element 20_1 via the connection terminal 203 a. The input-outputterminal IOb of the switch 21 a is connected to the connection terminal71 a, and the input-output terminal IOc of the switch 21 a is connectedto the connection terminal 72 a via the resistor 244 and also connectedto the other of the source and the drain of the transistor included inthe switch 51.

The input-output terminal IOa of the switch 21 b is connected to theconnection terminal 203 b. Accordingly, the input-output terminal IOa ofthe switch 21 b can be connected to the negative electrode of the powerstorage element 20_1 via the connection terminal 203 b. The input-outputterminal IOb of the switch 21 b is connected to the connection terminal71 b, and the input-output terminal IOc of the switch 21 b is connectedto the connection terminal 72 b.

A control signal CTL4 is input from the encoder 240 to the controlterminal CTL_1 of the switch 22 a and the control terminal CTL_1 of theswitch 22 b. An inversion signal of the control signal CTL4 is inputfrom the inverter 241_4 to the control terminal CTL_2 of the switch 22 aand the control terminal CTL_2 of the switch 22 b.

The input-output terminal IOa of the switch 22 a is connected to theconnection terminal 204 a. Thus, the input-output terminal IOa of theswitch 22 a can be connected to the positive electrode of the powerstorage element 20_2 via the connection terminal 204 a. The input-outputterminal IOb of the switch 22 a is connected to the connection terminal71 a, and the input-output terminal IOc of the switch 22 a is connectedto the connection terminal 72 a via the resistor 244.

The input-output terminal IOa of the switch 22 b is connected to theconnection terminal 204 b. Accordingly, the input-output terminal IOa ofthe switch 22 b can be connected to the negative electrode of the powerstorage element 20_2 via the connection terminal 204 b. The input-outputterminal 10 b of the switch 22 b is connected to the connection terminal71 b, and the input-output terminal IOc of the switch 22 b is connectedto the connection terminal 72 b.

One of the source and the drain of the transistor included in the switch51 is connected to the input-output terminal IOc of the switch 11 b andthe input-output terminal IOc of the switch 12 b, and the other isconnected to the input-output terminal IOc of the switch 21 a and theinput-output terminal IOc of the switch 22 a. The potential of the gateof the transistor included in the switch 51 is controlled by a logiccircuit 243. The output of the logic circuit 243 corresponds to alogical sum of the potential of the control signal CTL1 and thepotential of the control signal CTL2. Accordingly, the conduction stateof the switch 51 is controlled with the potential of the control signalCTL1 and the potential of the control signal CTL2. The logic circuit 243includes an OR circuit, for example.

One of the source and the drain of the transistor included in the switch61 is connected to the input-output terminal IOc of the switch 11 a andthe input-output terminal IOc of the switch 12 a, and the other isconnected to the input-output terminal IOc of the switch 21 a and theinput-output terminal IOc of the switch 22 a. The potential of a gate ofthe transistor included in the switch 61 is controlled by a logiccircuit 247. The output of the logic circuit 247 corresponds to alogical sum of the potential of the inversion signal of the controlsignal CTL1 and the potential of the inversion signal of the controlsignal CTL2. Accordingly, the conduction state of the switch 61 iscontrolled with the potential of the inversion signal of the controlsignal CTL1 and the potential of the inversion signal of the controlsignal CTL2. The logic circuit 247 includes an OR circuit, for example.

The encoder 240 has a function of encoding a plurality of data signalsinput from the semiconductor circuit 246 to generate and output controlsignals CTL1 to CTL4.

The current detection circuit 245 has a function of detecting potentialsat both ends of the resistor 244 and inputting each of the potentials toa comparison circuit as detection signals so as to determine whether thecurrent flowing through the resistor 244 is larger than a referencevalue.

The semiconductor circuit 246 has a function of generating andoutputting a plurality of data signals including an instruction tocharge or discharge the power storage elements. Note that thesemiconductor circuit 246 may exchange signals with an external circuitsuch as a load, for example. For example, the semiconductor circuit 246may be a microcomputer, a microprocessor (also referred to as an MPU), amicrocontroller unit (also referred to as an MCU), a field programmablegate array (also referred to as an FPGA), a central processing unit(also referred to as a CPU), or a battery management unit (also referredto as a BMU).

Note that transistors used in the switches of the circuit 200 (e.g., theswitch 11 a, the switch 11 b, the switch 12 a, the switch 12 b, theswitch 21 a, the switch 21 b, the switch 22 a, the switch 22 b, theswitch 51, the switch 61) may be transistors with low off-state current.As the transistors with low off-state current, a transistor including achannel formation region that includes an oxide semiconductor with awider bandgap than that of silicon and is substantially i-type can beused, for example. The structure is not limited to that of the circuit200, and the transistors with low off-state current can also be used inthe switch 31 a, the switch 31 b, the switch 32 a, the switch 32 b, theswitch 33 a, the switch 33 b, the switch 52, the switch 62, and the likeshown in FIG. 2, for example. Without being limited to the abovestructures, the switches may be formed using a semiconductor includingsilicon.

The transistor including the oxide semiconductor can be fabricated insuch a manner that, for example, impurities such as hydrogen or waterare reduced as much as possible and oxygen vacancies are reduced as muchas possible by supply of oxygen. At this time, the amount of hydrogenthat is regarded as a donor impurity in the channel formation region ispreferably reduced to lower than or equal to 1×10¹⁹/cm³, furtherpreferably lower than or equal to 1×10¹⁸/cm³ by secondary ion massspectrometry (also referred to as SIMS). The off-state current permicrometer of the channel width of the transistor at 25° C. is lowerthan or equal to 1×10⁻¹⁹ A (100 zA), preferably lower than or equal to1×10⁻²² A (100 yA). It is preferable that the off-state current of thetransistor be as low as possible; the lowest value of the off-statecurrent of the transistor is estimated to be about 1×10⁻³⁰ A/μm.

The oxide semiconductor can be, for example, an In-based metal oxide, aZn-based metal oxide, an In—Zn-based metal oxide, or an In—Ga—Zn-basedmetal oxide.

Here, an example of the semiconductor circuit 246 will be described herewith reference to FIG. 9.

The semiconductor circuit 246 shown in FIG. 9 includes a processor 710,a bus bridge 711, a memory 712, a memory interface 713, a controller720, an interrupt controller 721, an I/O interface (input-outputinterface) 722, and a power gate unit 730.

The semiconductor circuit 246 further includes a crystal oscillationcircuit 741, a timer circuit 745, an I/O interface 746, an I/O port 750,a comparator 751, an I/O interface 752, a bus line 761, a bus line 762,a bus line 763, and a data bus line 764. Further, the semiconductorcircuit 246 includes at least connection terminals 770 to 776 forconnection to an external device. Note that each of the connectionterminals 770 to 776 represents one terminal or a terminal groupincluding a plurality of terminals. An oscillation unit 742 including aquartz crystal oscillator 743 is connected to the semiconductor circuit246 through the connection terminal 772 and the connection terminal 773.

The processor 710 includes a register 785 and is connected to the buslines 761 to 763 and the data bus line 764 through the bus bridge 711.

The memory 712 is a memory device capable of functioning as a mainmemory of the processor 710, and a random access memory is used, forexample. The memory 712 stores an instruction executed by the processor710, data necessary for execution of an instruction, and data onprocessing of the processor 710. In accordance with the instructionprocessed by the processor 710, writing and reading of data to/from thememory 712 are carried out. For example, the semiconductor circuit 246may generate a data signal in accordance with an instruction on theconnection of each power storage element and output the data signal viathe I/O port 750.

In the semiconductor circuit 246, power supply to the memory 712 isblocked in a low power consumption mode. Therefore, a memory capable ofstoring data when power is not supplied to the memory is preferably usedas the memory 712.

The memory interface 713 is an input-output interface with an externalmemory device. Under the instruction executed by the processor 710, datais written into and read out from the external memory device connectedto the connection terminal 776 via the memory interface 713.

A clock generation circuit 715 is a circuit that generates a clocksignal MCLK (hereinafter, also simply referred to as “MCLK”) to be usedin the processor 710, and includes an RC oscillator and the like. MCLKis also output to the controller 720 and the interrupt controller 721.

The controller 720 is a circuit that controls the semiconductor circuit246, and can carry out control of a power supply of the semiconductorcircuit 246, control of the clock generation circuit 715 and the crystaloscillation circuit 741, and the like.

The connection terminal 770 is a terminal for inputting an externalinterrupt signal. A non-maskable interrupt signal NMI is input to thecontroller 720 through the connection terminal 770. As soon as thenon-maskable interrupt signal NMI is input to the controller 720, thecontroller 720 outputs the non-maskable interrupt signal NMI2 to theprocessor 710, so that the processor 710 executes interrupt processing.

The interrupt signal TNT is input to the interrupt controller 721through the connection terminal 770. Interrupt signals (T01RQ, P01RQ,and C01RQ) from the peripheral circuits are input to the interruptcontroller 721 without passing through the buses (761 to 764).

The interrupt controller 721 has a function of assigning priorities tointerrupt requests. When the interrupt controller 721 detects theinterrupt signal, the interrupt controller 721 determines whether theinterrupt request is valid or not. If the interrupt request is valid,the interrupt controller 721 outputs an interrupt signal IRQ to thecontroller 720.

The interrupt controller 721 is connected to the bus line 761 and thedata bus line 764 through an I/O interface 722.

When the interrupt signal INT is input, the controller 720 outputs theinterrupt signal INT2 to the processor 710 and makes the processor 710execute interrupt processing.

The interrupt signal T01RQ is directly input to the controller 720without passing through the interrupt controller 721 in some cases. Whenthe controller 720 receives the interrupt signal T01RQ, the controller720 outputs the non-maskable interrupt signal NMI2 to the processor 710,so that the processor 710 executes interrupt processing.

A register 780 of the controller 720 is provided in the controller 720.A register 786 of the interrupt controller 721 is provided in the I/Ointerface 722.

Next, a peripheral circuit included in the semiconductor circuit 246will be described. The semiconductor circuit 246 includes the timercircuit 745, the I/O port 750, and the comparator 751 as peripheralcircuits. These are examples of the peripheral circuits, and a circuitneeded for an electrical appliance using the semiconductor circuit 246can be provided as appropriate.

The timer circuit 745 has a function of measuring time based on a clocksignal TCLK (hereinafter, also simply referred to as “TCLK”) output froma clock generation circuit 740. A plurality of timer circuits may beprovided in the timer circuit 745. In addition, the timer circuit 745can output the interrupt signal T01RQ to the controller 720 and theinterrupt controller 721 at a set time interval. The timer circuit 745is connected to the bus line 761 and the data bus line 764 through theI/O interface 746. For example, the timer circuit 745 has a function ofcontrolling charge time or discharge time of the power storage elements.

TCLK is a clock signal having a frequency lower than that of MCLK. Forexample, the frequency of MCLK is about several megahertz (MHz) (e.g., 8MHz) and the frequency of TCLK is about several tens of kilohertz (kHz)(e.g., 32 kHz). The clock generation circuit 740 includes the crystaloscillation circuit 741 incorporated in the semiconductor circuit 246,and the oscillation unit 742 which is connected to the connectionterminal 772 and the connection terminal 773. The quartz crystaloscillator 743 is used as an oscillator of the oscillation unit 742. Inaddition, the clock generation circuit 740 is made up of a CR oscillatorand the like, and thereby, all modules in the clock generation circuit740 can be incorporated in the semiconductor circuit 246.

The I/O port 750 is an interface that inputs and outputs information toand from an external device connected to the I/O port 750 through theconnection terminal 774 and is an input-output interface for a digitalsignal. For example, the I/O port 750 outputs the interrupt signal P01RQto the interrupt controller 721 in accordance with an input digitalsignal. The I/O pot 750 is connected to the encoder 240 and the currentdetection circuit 245 which are shown in FIG. 7, through the connectionterminal 774. Accordingly, a data signal can be output to the encoder240. A detection signal is input from the current detection circuit 245.Note that a plurality of connection terminals 774 may be provided.

The comparator 751 can compare a potential (or current) of the analogsignal inputted from the connection terminal 775 with a potential (orcurrent) of a reference signal and generate a digital signal having alevel of 0 or 1. Further, the comparator 751 can generate the interruptsignal C01RQ depending on the level of this digital signal. Theinterrupt signal C01RQ is output to the interrupt controller 721.

The I/O port 750 and the comparator 751 are connected to the bus line761 and the data bus line 764 through the I/O interface 752 common tothe both. Here, one I/O interface 752 is used because the I/O interfacesof the I/O port 750 and the comparator 751 can share a circuit; however,the I/O port 750 and the comparator 751 can each have an I/O interfaceseparately.

In addition, a register of each peripheral circuit is placed in theinput/output interface corresponding to the peripheral circuit. Aregister 787 of the timer circuit 745 is placed in the I/O interface746, and a register 783 of the I/O port 750 and a register 784 of thecomparator 751 are placed in the I/O interface 752.

The semiconductor circuit 246 includes the power gate unit 730 that canblock power supply to the internal circuits. Power is supplied only to acircuit necessary for operation by the power gate unit 730, so thatpower consumption of the semiconductor circuit 246 can be lowered.

As shown in FIG. 9, circuits in a unit 701, a unit 702, a unit 703, anda unit 704 in the semiconductor circuit 246 which are surrounded bychain double-dashed lines are connected to the connection terminal 771through the power gate unit 730.

In this embodiment, the unit 701 includes the timer circuit 745, and theI/O interface 746. The unit 702 includes the I/O port 750, thecomparator 751, and the I/O interface 752. The unit 703 includes theinterrupt controller 721, and the I/O interface 722. The unit 704includes the processor 710, the memory 712, the bus bridge 711, and thememory interface 713.

The power gate unit 730 is controlled by the controller 720. The powergate unit 730 includes a switch circuit 731 and a switch circuit 732 forblocking supply of power supply voltage to the units 701 to 704. As thepower supply voltage at this time, a power supply voltage of a controlsystem or the like can be used, for example.

The switching of the switch circuits 731 and 732 is controlled by thecontroller 720. Specifically, the controller 720 outputs a signal toturn off some or all of the switches included in the power gate unit730, depending on the request by the processor 710 (power supply stop).In addition, the controller 720 outputs a signal to turn on the switchesincluded in the power gate unit 730 with, as a trigger, the non-maskableinterrupt signal NMI or the interrupt signal T01RQ from the timercircuit 745 (start of power supply).

FIG. 9 illustrates a structure where two switches (the switches 731 and732) are provided in the power gate unit 730; however, the structure isnot limited thereto. Switches may be provided as much as needed to blocksupply of power.

In this embodiment, the switch 731 is provided to individually controlsupply of power to the unit 701 and the switch circuit 732 is providedto individually control supply of power to the units 702 to 704.However, this embodiment of the present invention is not limited to sucha power supply path. For example, another switch which is not the switchcircuit 732 may be provided to individually control supply of power tothe memory 712. Further, a plurality of switches may be provided for onecircuit.

In addition, a power supply voltage is constantly supplied from theconnection terminal 771 to the controller 720 without passing throughthe power gate unit 730. In order to reduce noise, a power supplypotential from an external power supply circuit, which is different fromthe power supply circuit for the power supply voltage, is given to boththe oscillation circuit of the clock generation circuit 715 and thecrystal oscillation circuit 741.

By provision of the controller 720, the power gate unit 730, and thelike, the semiconductor circuit 246 can operate in three kinds ofoperation modes. The first operation mode is a normal operation modewhere all circuits included in the semiconductor circuit 246 are active.Here, the first operation mode is referred to as “Active mode”.

The second and third operation modes are low power consumption modeswhere some of the circuits are active. In the second operation mode, thecontroller 720, the timer circuit 745, and circuits (the crystaloscillation circuit 741 and the I/O interface 746) associated theretoare active. In the third operation mode, only the controller 720 isactive. Here, the second operation mode is referred to as “the Noff1mode” and the third operation mode is referred to as “the Noff2 mode”.Only the controller 720 and some of the peripheral circuits (circuitsnecessary for timer operation) operate in the Noff1 mode and only thecontroller 720 operates in the Noff2 mode.

Note that power is constantly supplied to the oscillator of the clockgeneration circuit 715 and the crystal oscillation circuit 741regardless of the operation modes. In order to bring the clockgeneration circuit 715 and the crystal oscillation circuit 741 intonon-active state, an enable signal is inputted from the controller 720or an external circuit to stop oscillation of the clock generationcircuit 715 and the crystal oscillation circuit 741.

In addition, in Noff1 and Noff2 modes, power supply is blocked by thepower gate unit 730, so that the I/O port 750 and the I/O interface 752are in non-active state, but power is supplied to parts of the I/O port750 and the I/O interface 752 in order to allow the external deviceconnected to the connection terminal 774 to operate normally.Specifically, power is supplied to an output buffer of the I/O port 750and the register 783 of the I/O port 750.

Note that in this specification, the phrase “a circuit is in non-activestate” includes a state where major functions in Active mode (normaloperation mode) are stopped and an operation state with powerconsumption lower than that of Active mode, as well as a state that acircuit is stopped by blocking of power supply.

With the above-described structure, when the charge operation of a powerstorage device is forcibly terminated by a user, for example, a signalto turn off some or all of the switches included in the power gate unit730 can be output depending on the request by the processor 710, and themode can be switched to the Noff1 or Noff2 mode to stop power supply toan unnecessary circuit block.

[2.2. Driving Method]

Further, an operation example of the control system will be describedwith reference to the above example of the method for driving the powerstorage system.

In the case of charging at least one power storage element, potentialsof control signals CTL1 to CTL4 are set by the encoder 240, so that apositive electrode and a negative electrode of the charged power storageelement are connected to the connection terminal 71 a and the connectionterminal 71 b.

For example, in the case of charging the power storage element 10_1, thepower storage element 10_2, the power storage element 20_1, and thepower storage element 20_2, the transistor 251 is turned on and thetransistor 252 is turned off in each of the switches 11 a, 11 b, 12 a,12 b, 21 a, 21 b, 22 a, and 22 b, by the control signals CTL1 to CTL4.Further, the transistor included in the switch 51 is turned off.

At this time, since the power storage element 10_1, the power storageelement 10_2, the power storage element 20_1, and the power storageelement 20_2 and the connection terminal 71 a and the connectionterminal 71 l are in a conducting state, the power storage element 10_1,the power storage element 10_2, the power storage element 20_1, and thepower storage element 20_2 are charged via the connection terminal 71 aand the connection terminal 71 b.

In the case of discharging at least one power storage element,potentials of the control signals CTL1 to CTL4 are set by the encoder240 so that a positive electrode and a negative electrode of thedischarged power storage element are connected to the connectionterminal 72 a and the connection terminal 72 b.

For example, in the case of discharging the power storage element 10_1,the power storage element 10_2, the power storage element 20_1, and thepower storage element 20_2, the transistor 252 is turned on and thetransistor 251 is turned off in each of the switches 11 a, 11 b, 12 a,12 b, 21 a, 21 b, 22 a, and 22 b, by the control signals CTL1 to CTL4.Further, the transistor included in the switch 51 is turned on and thetransistor included in the switch 61 is turned off by the control signalCTL1 and the control signal CTL2.

At this time, since the power storage element 10_1, the power storageelement 10_2, the power storage element 20_1, and the power storageelement 20_2 and the connection terminal 72 a and the connectionterminal 72 b are in a conducting state, the power storage element 10_1,the power storage element 10_2, the power storage element 20_1, and thepower storage element 20_2 are discharged via the connection terminal 72a and the connection terminal 72 b.

Note that whether to charge the power storage element can be selecteddepending on the detection signal output from the current detectioncircuit 245.

For example, when it is determined by the current detection circuit 245that the amount of current flowing through the resistor 244 is lowerthan or equal to the reference value, a detection signal is set at highlevel. At this time, the semiconductor circuit 246 determines thatcharge of the power storage element is necessary. When the semiconductorcircuit 246 is in a lower power consumption mode, the interrupt signalP01RQ is set active to restart power supply to the processor 710.Further, the semiconductor circuit 246 generates a data signal inaccordance with an instruction to charge the power storage element andoutput the data signal via the I/O port 750. Note that in thesemiconductor circuit 246 shown in FIG. 9, only one connection terminal774 for the I/O port 750 is shown; however, the number of connectionterminals 774 is not limited to one. A plurality of connection terminals774 may be provided when a plurality of data signals is generated andoutput as in this example of the driving method.

At this time, the encoder 240 sets potentials of the control signalsCTL1 to CTL4 by encoding the input data signal. Thus, a target powerstorage element among the power storage element 10_1, the power storageelement 10_2, the power storage element 20_1, and the power storageelement 20_2 can be connected to the connection terminal 71 a and theconnection terminal 71 b and charged.

To adjust the amount of current flowing through a load, the number ofpower storage elements connected in series to the load is changed. Inthis case, instruction data to set the connection state of the powerstorage element 10_1, the power storage element 10_2, the power storageelement 20_1, and the power storage element 20_2 in accordance with thedesired amount of current is written in the memory 712 in advance.

For example, in the case where the amount of current flowing through theload may be lower than the maximum amount of current, the semiconductorcircuit 246 generates a data signal in accordance with the instructionto set the desired amount of current and outputs the data signal throughthe/O port 750.

At this time, the encoder 240 sets potentials of the control signalsCTL1 to CTL4 by encoding the input data signal. Thus, the transistors252 and 251 in each of the switches 11 a, 11 b, 12 a, 12 b, 21 a, 21 b,22 a, and 22 b, the transistor included in the switch 51, and thetransistor included in the switch 61 are controlled; in this manner, thenumber of power storage elements connected in series can be set.

In the case where charge or discharge of the power storage device isperformed, data to set reference values of charge time or discharge timeis written in advance to the register 787 of the I/O interface 746. Thetimer circuit 745 measures the time. In the semiconductor circuit 246,when the measurement value of the timer circuit 745 reaches the value ofthe time data prewritten to the register 787, the timer circuit 745 setsT01RQ active and outputs an interrupt signal. Then, the interrupt signalINT2 is transmitted to the processor 710 through the interruptcontroller 721. The processor 710 executes an instruction to switch tocharge or discharge and generates a data signal and output it throughthe I/O port 750.

For example, in the case of charging or discharging the power storagedevice including the power storage element 10_1, when the measurementvalue exceeds the value of the time data written to the register 787 inthe timer circuit 745, the semiconductor circuit 246 generates a datasignal in accordance with an instruction to execute discharge of thepower storage element 10_1 with the use of the processor 710 and outputsthe data signal to the encoder 240 through the I/O port 750. The encoder240 encodes the input signal and sets the potentials of the controlsignals CTL1 to CTL4, so that the power storage element 10_1 and theconnection terminal 72 a and the connection terminal 72 b are set in aconducting state. Accordingly, the power storage element 10_1 isdischarged.

By setting the charge time and discharge time of the register 787 of theI/O interface 746 in this manner, the length of the charge time anddischarge time is controlled by the timer circuit 745. Thus, charge anddischarge can be performed.

In the above-described manner, the switches are controlled with thesemiconductor circuit 246 and the encoder 240; thus, charge or dischargeof the power storage elements can be controlled.

Embodiment 3. Register

Further, an example of a structure of the register which can be used ineach circuit block of the semiconductor circuit 246 will be describedwith reference to FIGS. 10A and 10B.

[3.1. Configuration]

The register illustrated in FIG. 10A includes a memory circuit 651, amemory circuit 652, and a selector 653.

The memory circuit 651 is supplied with a reset signal RST, a clocksignal CLK, and a data signal D. The memory circuit 651 has a functionof storing data of the data signal D in accordance with the clock signalCLK and outputting the data as a data signal Q. For example, a registersuch as a buffer register or a general-purpose register can be used asthe memory circuit 651. As the memory circuit 651, a cache memoryincluding a static random access memory (SRAM) or the like can beprovided. Data of such a register or a cache memory can be stored in thememory circuit 652.

The memory circuit 652 is supplied with a write control signal WE, aread control signal RD, and a data signal.

The memory circuit 652 has a function of storing data of an input datasignal in accordance with the write control signal WE and outputting thestored data as a data signal in accordance with the read control signalRD.

In the selector 653, the data signal D or the data signal output fromthe memory circuit 652 is selected in accordance with the read controlsignal RD, and input to the memory circuit 651.

The memory circuit 652 includes a transistor 631 and a capacitor 632.

The transistor 631, which is an n-channel transistor, functions as aselection transistor. One of a source and a drain of the transistor 631is connected to an output terminal of the memory circuit 651. Further, apower supply potential is supplied to a back gate of the transistor 631.The transistor 631 has a function of controlling the retention of a datasignal output from the memory circuit 651 in accordance with the writecontrol signal WE.

A transistor with low off-state current may be used as the transistor631, for example.

One of a pair of electrodes of the capacitor 632 is connected to theother of the source and the drain of the transistor 631, and the otherof the pair of electrodes is supplied with a low power source potentialVSS. The capacitor 632 has a function of holding charge based on data ofa stored data signal. Since the off-state current of the transistor 631is extremely low, the charge in the capacitor 632 is held and thus thedata is stored even when the supply of the power source voltage isstopped. A power supply voltage (VDD-VSS) is generated using powersupplied from a power storage element, for example.

A transistor 633 is a p-channel transistor. The high power sourcepotential VDD is supplied to one of a source and a drain of thetransistor 633, and the read control signal RD is input to a gate of thetransistor 633.

A transistor 634 is an n-channel transistor. One of a source and a drainof the transistor 634 is connected to the other of the source and thedrain of the transistor 633, and the read control signal RD is input toa gate of the transistor 634.

A transistor 635 is an n-channel transistor. One of a source and a drainof the transistor 635 is connected to the other of the source and thedrain of the transistor 634, and the low power source potential VSS isinput to the other of the source and the drain of the transistor 635.

An input terminal of an inverter 636 is connected to the other of thesource and the drain of the transistor 633. An output terminal of theinverter 636 is connected to the input terminal of the selector 653.

One of a pair of electrodes of a capacitor 637 is connected to the inputterminal of the inverter 636, and the other of the pair of electrodes issupplied with the low power source potential VSS. The capacitor 637 hasa function of holding charge based on data of a data signal input to theinverter 636.

Note that without limitation to the above, the memory circuit 652 mayinclude a phase-change RAM (PRAM), a phase change memory (PCM), aresistive RAM (ReRAM), a magnetoresistive RAM (MRAM), or the like. Forthe MRAM, a magnetic tunnel junction element (MTJ element) can be usedfor example.

[3.2. Driving Method]

Next, an example of a method for driving the register illustrated inFIG. 10A will be described.

First, in a normal operation period, the register is supplied with thepower supply voltage that is power for the register, the reset signalRST, and the clock signal CLK. At this time, the selector 653 outputsdata of the data signal D to the memory circuit 651. The memory circuit651 stores the data of the data signal D in accordance with the clocksignal CLK. At this time, in response to the read control signal RD, thetransistor 633 is turned on while the transistor 634 is turned off.

Then, in a backup period provided immediately before the supply of thepower supply voltage is stopped, in accordance with the write controlsignal WE, the transistor 631 is turned on, the data of the data signalD is stored in the memory circuit 652, and the transistor 631 is turnedoff. After that, the supply of the clock signal CLK to the register isstopped, and then, the supply of the reset signal RST to the register isstopped. Note that when the transistor 631 is on, the back gate of thetransistor 631 may be supplied with a positive power supply potential.At this time, in response to the read control signal RD, the transistor633 is turned on while the transistor 634 is turned off.

Next, in a power stop period, the supply of the power supply voltage tothe register is stopped. During this period, the stored data is heldbecause the off-state current of the transistor 631 is low in the memorycircuit 652. Note that the supply of the power supply voltage may bestopped by supplying the ground potential GND instead of the high powersupply potential VDD. Note that when the transistor 631 is off, the backgate of the transistor 631 may be supplied with a negative power supplypotential, so that the transistor 631 is kept off.

Then, in a recovery period immediately before a normal operation period,the supply of the power supply voltage to the register is restarted;then, the supply of the clock signal CLK is restarted, and after that,the supply of the reset signal RST is restarted. At this time, beforethe supply of the clock signal CLK is restarted, the wiring which is tobe supplied with the clock signal CLK is set to the high power supplypotential VDD. Moreover, in accordance with the read control signal RD,the transistor 633 is turned of the transistor 634 is turned on, and thedata signal stored in the memory circuit 652 is output to the selector653. The selector 653 outputs the data signal to the memory circuit 651in accordance with the read control signal RD. Thus, the memory circuit651 can be returned to a state just before the power stop period.

Then, in a normal operation period, normal operation of the memorycircuit 651 is performed again.

The above is an example of the method for driving the registerillustrated in FIG. 10A.

Note that the structure of the register 511 is not limited to thatillustrated in FIG. 10A.

For example, the register illustrated in FIG. 10B has a structure inwhich the transistors 633 and 634, the inverter 636, and the capacitor637 we removed from the register illustrated in FIG. 10A and a selector654 is added to the register illustrated in FIG. 10A. For the samecomponents as those in the register illustrated in FIG. 10A, thedescription of the register in FIG. 10A is referred to as appropriate.

One of the source and the drain of the transistor 635 is connected tothe input terminal of the selector 653.

In the selector 654, the low power supply potential VSS to be data orthe data signal output from the memory circuit 651 is selected inaccordance with the write control signal WE2, and input to the memorycircuit 652.

Next, an example of a method for driving the register illustrated inFIG. 10B will be described.

First, in a normal operation period, the register is supplied with thepower supply voltage, the reset signal RST, and the clock signal CLK. Atthis time, the selector 653 outputs data of the data signal D to thememory circuit 651. The memory circuit 651 stores the data of the datasignal D in accordance with the clock signal CLK. In addition, theselector 654 outputs the low power supply potential VSS to the memorycircuit 652 in accordance with the write control signal WE2. In thememory circuit 652, the transistor 631 is turned on in response to thewrite control signal WE, and the low power supply potential VSS isstored as data in the memory circuit 652.

Then, in a backup period provided immediately before the supply of thepower source voltage is stopped, the selector 654 does not supply thelow power supply potential VSS but provides electrical conductionbetween the output terminal of the memory circuit 651 and one of thesource and the drain of the transistor 631 in accordance with the writecontrol signal WE2. Further, in accordance with the write control signalWE, the transistor 631 is turned on, the data of the data signal D isstored in the memory circuit 652, and the transistor 631 is turned off.At this time, the data of the memory circuit 652 is rewritten only whenthe potential of the data signal D is equal to the high power supplypotential VDD. Furthermore, the supply of the clock signal CLK to theregister is stopped, and then, the supply of the reset signal RST to theregister is stopped. Note that when the transistor 631 is on, the backgate of the transistor 631 may be supplied with a positive power supplypotential.

Next, in a power stop period, the supply of the power supply voltage tothe register is stopped. During this period, the stored data is held inthe memory circuit 652 because the off-state current of the transistor631 is low. Note that the supply of the power supply voltage may bestopped by supplying the ground potential GND instead of the high powersupply potential VDD. Note that when the transistor 631 is off, the backgate of the transistor 631 may be supplied with a negative power supplypotential from a multiplexer, so that the transistor 631 is kept off.

Then, in a recovery period immediately before a normal operation period,the supply of the power supply voltage to the register is restarted,then, the supply of the clock signal CLK is restarted, and after that,the supply of the reset signal RST is restarted. At this time, beforethe supply of the clock signal CLK is restarted, the wiring which is tobe supplied with the clock signal CLK is set to the high power supplypotential VDD. In accordance with the read control signal RD, theselector 653 outputs to the memory circuit 651 the data signalcorresponding to the data stored in the memory circuit 652. Thus, thememory circuit 651 can be returned to a state just before the power stopperiod.

Then, in a normal operation period, normal operation of the memorycircuit 651 is performed again.

The above is an example of the method for driving the registerillustrated in FIG. 10B.

By using the structure illustrated in FIG. 10B, the data of the lowpower supply potential VSS does not need to be written in the backupperiod, resulting in an increase in operation speed.

In the case of using the above-described register in the registers 784to 787, when Active mode shifts to Noff1 or Noff2 mode, prior to theblock of power supply, data stored in the memory circuit 651 of theregisters 784 to 787 is written to the memory circuit 652, so that datain the memory circuit 651 is reset to initial values; as a result,supply of power is blocked.

In the case where Noff1 or Noff2 mode is returned to Active mode, whenpower supply to the registers 784 to 787 is restarted, data in thememory circuit 651 is reset to initial values. Then, data in the memorycircuit 652 is written to the memory circuit 651.

Accordingly, even in the low power consumption mode, data needed forprocessing of the semiconductor circuit 246 is stored in the registers784 to 787, and thus, the semiconductor circuit 246 can return from thelow power consumption mode to Active mode immediately. Accordingly,power consumption of the semiconductor circuit 246 can be reduced.

Embodiment 4. Memory

An example of a memory available in one embodiment of the presentinvention will be described. The memory can be used in the memory 712 inFIG. 9, for example.

[4.1. SRAM]

Here, a static random access memory (SRAM), which is a memory includinga flip-flop to which a circuit of an inverter is applied, will bedescribed.

An SRAM retains data by using a flip-flop. Thus, unlike a dynamic randomaccess memory (DRAM), an SRAM does not require refresh operation.Therefore, power consumption during data retention can be reduced. Inaddition, an SRAM does not require a capacitor and is therefore suitablefor applications where high speed operation is required.

FIG. 11 is a circuit diagram corresponding to a memory cell of an SRAMin one embodiment of the present invention. Note that FIG. 11illustrates only one memory cell; one embodiment of the presentinvention can also be applied to a memory cell array in which aplurality of such memory cells is arranged.

The memory cell illustrated in FIG. 11 includes a transistor Tr1 e, atransistor Tr2 c, a transistor Tr3 e, a transistor Tr4 e, a transistorTr5 e, and a transistor Tr6 e. The transistors Tr1 e and Tr2 e arep-channel transistors. The transistors Tr3 e and Tr4 e are n-channeltransistors. A gate of the transistor Tr1 e is electrically connected toa drain of the transistor Tr2 e, a gate of the transistor Tr3 e, a drainof the transistor Tr4 e, and one of a source and a drain of thetransistor Tr6 e. VDD is supplied to a source of the transistor Tr1 e. Adrain of the transistor Tr1 e is electrically connected to a gate of thetransistor Tr2 e, a drain of the transistor Tr3 e, and one of a sourceand a drain of the transistor Tr5 e. VDD is supplied to a source of thetransistor Tr2 e. GND is supplied to a source of the transistor Tr3 e. Aback gate of the transistor Tr3 e is electrically connected to a backgate line BGL. GND is supplied to a source of the transistor Tr4 e. Aback gate of the transistor Tr4 e is electrically connected to the backgate line BGL. A gate of the transistor Tr5 e is electrically connectedto a word line WL. The other of the source and the drain of thetransistor Tr5 e is electrically connected to a bit line BLB. A gate ofthe transistor Tr6 e is electrically connected to the word line WL. Theother of the source and the drain of the transistor Tr6 e iselectrically connected to a bit line BL.

Note that this embodiment shows an example where n-channel transistorsare used as the transistors Tr5 e and Tr6 e. However, the transistorsTr5 e and Tr6 e are not limited to n-channel transistors and may bep-channel transistors. In that case, writing, retaining, and readingmethods described below may be changed as appropriate.

Thus, a flip-flop has a structure in which an inverter including thetransistors Tr1 e and 3 e and an inverter including the transistors Tr2e and Tr4 e we connected in a ring.

The p-channel transistors may be, but ae not limited to, transistorsincluding silicon, for example. The n-channel transistors may each bethe transistor including an oxide semiconductor film described in theabove embodiment.

In this embodiment, the transistors Tr3 e and Tr4 e may each be thetransistor including an oxide semiconductor film described in the aboveembodiment. In addition, with an extremely low off-state current, thetransistor has an extremely low flow-through current.

Note that instead of the p-channel transistors, n-channel transistorsmay be applied to the transistors Tr1 e and Tr2 e. In the case wheren-channel transistors are used as the transistors Tr1 e and Tr2 e,depletion transistors may be employed.

Writing, retaining, and reading operation of the memory cell illustratedin FIG. 11 will be described below.

In writing, first, a potential corresponding to data 0 or data 1 isapplied to the bit line BL and the bit line BLB.

For example, in the case where data 1 is to be written, the high powersupply potential VDD is applied to the bit line BL and the groundpotential GND is applied to the bit line BLB. Then, a potential (VH)higher than or equal to the sum of the high power supply potential VDDand the threshold voltage of the transistors Tr5 e and Tr6 e is appliedto the word line WL.

Next, the potential of the word line WL is set to be lower than thethreshold voltage of the transistors Tr5 e and Tr6 e, whereby the data 1written to the flip-flop is retained. In the case of the SRAM, a currentflowing during retention of data is only the leakage current of thetransistors. Here, when the above-described transistor with lowoff-state current is applied to some of the transistors in the SRAM,stand-by power for retaining data is reduced.

In reading, the high power supply potential VDD is applied to the bitline BL and the bit line BLB in advance. Then, the VH is applied to theword line WL, so that the bit line BLB is discharged through thetransistors Tr5 e and 3 e to be equal to the ground potential GND, whilethe potential of the bit line BL is kept at the high power supplypotential VDD. The potential difference between the bit line BL and thebit line BLB is amplified by a sense amplifier (not illustrated),whereby the retained data 1 can be read.

In the case where data 0 is to be written, the ground potential GND isapplied to the bit line BL and the high power supply potential VDD isapplied to the bit line BLB; then, the VH is applied to the word lineWL. Next, the potential of the word line WL is set to be lower than thethreshold voltage of the transistors Tr5 e and Tr6 e, whereby the data 0written to the flip-flop is retained. In reading, the high power supplypotential VDD is applied to the bit line BL and the bit line BLB inadvance. Then, the VH is applied to the word line WL, so that the bitline BL is discharged through the transistors Tr6 e and Tr4 e to beequal to the ground potential GND, while the potential of the bit lineBLB is kept at the high power supply potential VDD. The potentialdifference between the bit line BL and the bit line BLB is amplified bythe sense amplifier, whereby the retained data 0 can be read.

In the above-described manner, an SRAM with low stand-by power can beprovided.

[4.2. DOSRAM]

A transistor including an oxide semiconductor film can have extremelylow off-state current. That is, the transistor has electricalcharacteristics in which leakage of charge through the transistor isunlikely to occur. As a memory which is superior in function to a knownmemory, a dynamic oxide semiconductor random access memory (DOSRAM) towhich a transistor having such electrical characteristics is appliedwill be described below. DOSRAM is a memory that uses theabove-described transistor with low off-state current as a selectiontransistor (a transistor serving as a switching element) of a memorycell.

First, the memory will be specifically described with reference to FIGS.12A and 12B. FIG. 12A is a circuit diagram showing a memory cell arrayof the memory. FIG. 12B is a circuit diagram of a memory cell.

The memory cell array in FIG. 12A includes a plurality of memory cells1050, a plurality of bit lines 1051, a plurality of word lines 1052, aplurality of capacitor lines 1053, and a plurality of sense amplifiers1054.

Note that the bit lines 1051 and the word lines 1052 are provided in agrid pattern, and the memory cell 1050 is provided for each intersectionof the bit line 1051 and the word line 1052. The bit lines 1051 areconnected to the sense amplifiers 1054, which have a function of readingthe potentials of the bit lines 1051 as data.

As shown in FIG. 12B, the memory cell 1050 includes a transistor 1055and a capacitor 1056. A gate of the transistor 1055 is electricallyconnected to the word line 1052. A source of the transistor 1055 iselectrically connected to the bit line 1051. A drain of the transistor1055 is electrically connected to one terminal of the capacitor 1056.The other terminal of the capacitor 1056 is electrically connected tothe capacitor line 1053.

FIG. 13 is a perspective view of a memory. The memory illustrated inFIG. 13 includes a plurality of layers of memory cell arrays (memorycell arrays 3400 a to 3400 n (n is an integer greater than or equal to2)) each including a plurality of memory cells as memory circuits in theupper portion, and a logic circuit 3004 which is necessary for operatingthe memory cell arrays 3400 a to 3400 n, in the lower portion.

A voltage retained in the capacitor 1056 gradually decreases with timedue to leakage through the transistor 1055. A voltage originally chargedfrom V0 to V1 is decreased with time to VA that is a limit for readingout data 1. This period is called a retention period T_1. In the case ofa two-level memory cell, refresh operation needs to be performed withinthe retention period T_1.

For example, in the case where the off-state current of the transistor1055 is not sufficiently small, the retention period T_1 becomes shortbecause the voltage retained in the capacitor 1056 significantly changeswith time. Accordingly, refresh operation needs to be frequentlyperformed. An increase in frequency of refresh operation increases powerconsumption of the memory.

Since the off-state current of the transistor 1055 is extremely small inthis embodiment, the retention period T_1 can be made extremely long. Inother words, the frequency of refresh operation can be reduced; thus,power consumption can be reduced. For example, in the case where amemory cell is formed using the transistor 1055 having an off-statecurrent of 1×10⁻²¹ A to 1×10⁻²⁵ A, data can be retained for several daysto several decades without supply of electric power.

As described above, according to one embodiment of the presentinvention, a memory with high degree of integration and low powerconsumption can be provided.

[4.3. NOSRAM]

Next, a non-volatile oxide semiconductor random access memory (NOSRAM)is described as a memory that is different from the memories shown inFIG. 11 and FIG. 13. NOSRAM is a memory that uses the transistor withlow off-state current as a selection transistor of a memory cell (atransistor serving as a switching element) and a transistor including asilicon material or the like as an output transistor of the memory cell.

FIG. 14A is a circuit diagram showing a memory cell and wirings includedin the memory. FIG. 14B is a graph showing the electricalcharacteristics of the memory cell in FIG. 14A.

As shown in FIG. 14A, the memory cell includes a transistor 1071, atransistor 1072, and a capacitor 1073. Here, a gate of the transistor1071 is electrically connected to a word line 1076. A source of thetransistor 1071 is electrically connected to a source line 1074. A drainof the transistor 1071 is electrically connected to a gate of thetransistor 1072 and one terminal of the capacitor 1073, and this portionis referred to as a node 1079. A source of the transistor 1072 iselectrically connected to a source line 1075. A drain of the transistor1072 is electrically connected to a drain line 1077. The other terminalof the capacitor 1073 is electrically connected to a capacitor line1078.

The memory illustrated in FIGS. 14A and 14B utilizes variation in theapparent threshold voltage of the transistor 1072, which depends on thepotential of the node 1079. For example, FIG. 14B shows a relationbetween a voltage V_(CL) of the capacitor line 1078 and a drain currentI_(d)_2 flowing through the transistor 1072.

Note that the potential of the node 1079 can be controlled through thetransistor 1071. For example, the potential of the source line 1074 isset to a high power supply potential VDD. In this case, when thepotential of the word line 1076 is set to be higher than or equal to thesum of the high power supply potential VDD and the threshold voltage Vthof the transistor 1071, the potential of the node 1079 can be HIGH.Further, when the potential of the word line 1076 is set to be lowerthan or equal to the threshold voltage Vth of the transistor 1071, thepotential of the node 1079 can be LOW.

Thus, the transistor 1072 has electrical characteristics shown witheither a V_(CL)-I_(d)_2 curve denoted as LOW or a V_(CL)-I_(d)_2 curvedenoted as HIGH. That is, when the potential of the node 1079 is LOW,I_(d)_2 is small at a V_(CL) of 0 V; accordingly, data 0 is stored.Further, when the potential of the node 1079 is HIGH, I_(d)_2 is largeat a V_(CL) of 0 V; accordingly, data 1 is stored. In this manner, datacan be stored.

By using the transistor with low off-state current as the transistor1071, data retention time can be lengthened. The transistor 1072prevents loss of data in data reading and thereby enables repetitivedata reading.

Embodiment 5. Structural Example of Semiconductor Device

A structural example of a semiconductor device used in a control system,a power storage system, or the like is described.

[5.1. Structure of Transistor]

First, examples of the structure of a transistor that can be used in thesemiconductor device are described.

Note that the structure of the transistor is not particularly limitedand can be selected as appropriate. As the structure of the transistor,a staggered type or a planar type having a bottom gate structure whichis described below can be employed. The transistor may have asingle-gate structure in which one channel formation region is formed ora multi-gate structure such as a double-gate structure in which twochannel formation regions are formed or a triple-gate structure in whichthree channel formation regions are formed. In addition, the transistormay have a structure in which two gate electrodes are provided above andbelow a channel formation region with gate insulating films providedtherebetween (in this specification, this structure is referred to as adual-gate structure). Alternatively, a channel-etch type orchannel-protective type transistor can be used.

[5.1.1. Bottom-Gate Structure]

FIGS. 15A to 15C illustrate a structural example of a transistor 421having a bottom-gate top-contact structure, which is one kind ofbottom-gate transistor. FIG. 15A is a plan view of the transistor 421.FIG. 15B is a cross-sectional view taken along the long dashed shortdashed line A1-A2 in FIG. 15A. FIG. 15C is a cross-sectional view takenalong the long dashed short dashed line B1-B2 in FIG. 15A.

The transistor 421 includes a gate electrode 401 provided over asubstrate 400 having an insulating surface, a gate insulating film 402provided over the gate electrode 401, an oxide film 404 overlapping withthe gate electrode 401 with the gate insulating film 402 providedtherebetween, and a source electrode 405 a and a drain electrode 405 bprovided in contact with the oxide film 404. In addition, an insulatingfilm 406 is provided so as to cover the source electrode 405 a and thedrain electrode 405 b and be in contact with the oxide film 404. Notethat the substrate 400 may be a substrate over which another element isformed.

Note that in the oxide film 404, a region in contact with the sourceelectrode 405 a and a region in contact with the drain electrode 405 bmay include an n-type region 403.

[5.1.2. Top-Gate Structure]

FIG. 16A illustrates a transistor 422 having a top-gate structure.

The transistor 422 includes an insulating film 408 provided over asubstrate 400 having an insulating surface, an oxide film 404 providedover the insulating film 408, a source electrode 405 a and a drainelectrode 405 b provided in contact with the oxide film 404, a gateinsulating film 409 provided over the oxide film 404, the sourceelectrode 405 a, and the drain electrode 405 b, and a gate electrode 410overlapping with the oxide film 404 with the gate insulating film 409provided therebetween.

Note that in the oxide film 404, a region in contact with the sourceelectrode 405 a and a region in contact with the drain electrode 405 bmay include an n-type region 403.

[5.1.3. Dual-Gate Structure]

FIG. 16B illustrates a transistor 423 having a dual-gate structure,which includes two gate electrodes above and below a channel formationregion with gate insulating films provided therebetween.

The transistor 423 includes a gate electrode 401 provided over asubstrate 400 having an insulating surface, a gate insulating film 402provided over the gate electrode 401, an oxide film 404 overlapping withthe gate electrode 401 with the gate insulating film 402 providedtherebetween, a source electrode 405 a and a drain electrode 405 bprovided in contact with the oxide film 404, a gate insulating film 409covering the source electrode 405 a and the drain electrode 405 b and incontact with the oxide film 404, and a gate electrode 410 overlappingwith the oxide film 404 with the gate insulating film 409 providedtherebetween.

Note that in the oxide film 404, a region in contact with the sourceelectrode 405 a and a region in contact with the drain electrode 405 bmay include an n-type region 403.

[5.2. Components of Transistor]

Components of the transistors will be described.

[5.2.1. Conductive Film]

As the gate electrode 401 and the gate electrode 410, a layer includingAl, Cr, Cu, Ta, Ti, Mo, W, or the like can be used, for example.

As the source electrode 405 a and the drain electrode 405 b, a layerincluding Al, Cr, Cu, Ta, Ti, Mo, W, or the like can be used, forexample.

[5.2.2. Insulating Film]

As the gate insulating film 402, the insulating film 406, and the gateinsulating film 409, a silicon oxide film, a silicon oxynitride film, asilicon nitride oxide film, a silicon nitride film, a gallium oxidefilm, an aluminum oxide film, an aluminum nitride film, or an aluminumoxynitride film can be used.

The insulating film can contain excess oxygen by being formed underdeposition conditions that enable a large amount of oxygen to becontained. In order to make the insulating film contain much more excessoxygen, oxygen is added by ion implantation, ion doping, or plasmatreatment. With this structure, oxygen can be supplied to an oxide film.

[5.2.3. Oxide Film]

Next, a material that can be used as the oxide film 404 is described.

The oxide film 404 can be an In-based metal oxide film, a Zn-based metaloxide film, an In—Zn-based metal oxide film, an In—Ga—Zn-based metaloxide film, or the like, for example.

For example, “In” may have a function of increasing conductivity of theoxide film 404. For example, “In” included in the oxide film 404 canimprove carrier mobility of the oxide film 404.

Alternatively, a metal oxide including another metal element instead ofpart or all of Ga in the In—Ga—Zn-based metal oxide may be used. As theaforementioned another metal element, a metal element that is capable ofbeing bonded to oxygen atoms more than gallium is can be used, forexample, and specifically one or more elements of titanium, zirconium,hafnium, germanium, and tin can be used, for instance. Alternatively, asthe aforementioned another metal element, one or more elements oflanthanum, cerium, praseodymium, neodymium, samarium, europium,gadolinium, terbium, dysprosium, holmium, erbium, thulium, ytterbium,and lutetium may be used. These metal elements may have a function as astabilizer and reduce generation of oxygen vacancies in the oxide film.Note that the amount of such a metal element added is determined so thatthe metal oxide can function as a semiconductor. When a metal elementthat is capable of being bonded to oxygen atoms more than gallium isused and oxygen is supplied to a metal oxide, oxygen defects in themetal oxide can be reduced.

For example, “Zn” may have a function of facilitating crystallization ofthe oxide film.

Specifically, the concentration of hydrogen in the oxide film can belower than or equal to 2×10²⁰ atoms/cm³, preferably lower than or equalto 5×10¹⁹ atoms/cm³, further preferably lower than or equal to 1×10¹⁹atoms/cm³, still further preferably lower than or equal to 5×10¹⁸atoms/cm³ in secondary ion mass spectrometry (SIMS).

The concentration of nitrogen in the oxide film can be lower than 5×10¹⁹atoms/cm³, preferably lower than or equal to 5×10¹⁸ atoms/cm³, furtherpreferably lower than or equal to 1×10¹⁸ atoms/cm³, still furtherpreferably lower than or equal to 5×10¹⁷ atoms/cm³ in SIMS.

The concentration of carbon in the oxide film can be lower than 5×10¹⁹atoms/cm³, preferably lower than or equal to 5×10¹⁸ atoms/cm³, furtherpreferably lower than or equal to 1×10¹⁸ atoms/cm³, still furtherpreferably lower than or equal to 5×10¹⁷ atoms/cm³ in SIMS.

The concentration of silicon in the oxide film can be lower than 5×10¹⁹atoms/cm³, preferably lower than or equal to 5×10¹⁸ atoms/cm³, furtherpreferably lower than or equal to 1×10¹⁸ atoms/cm³, still furtherpreferably lower than or equal to 5×10¹⁷ atoms/cm³.

Further, the concentration of sodium in the oxide film can be lower thanor equal to 5×10¹⁶ cm⁻³, preferably lower than or equal to 1×10¹⁶ cm⁻³,and further preferably lower than or equal to 1×10¹⁵ cm⁻³ in SIMS. Inaddition, the concentration of lithium in the oxide film can be lowerthan or equal to 5×10¹⁵ cm⁻³, and preferably lower than or equal to1×10¹⁵ cm⁻³ in SIMS. Further, the concentration of potassium in theoxide film can be lower than or equal to 5×10¹⁵ cm⁻³, and preferablylower than or equal to 1×10¹⁵ cm⁻³.

The amount of each of the following gas molecules (atoms) released fromthe oxide film is preferably less than or equal to 1×10¹⁹/cm³, andfurther preferably less than or equal to 1×10¹⁸/cm³, by thermaldesorption spectroscopy (TDS) analysis: a gas molecule (atom) having amass-to-charge ratio (m/z) of 2 (e.g., hydrogen molecule), a gasmolecule (atom) having a m/z of 18, a gas molecule (atom) having a m/zof 28, and a gas molecule (atom) having a m/z of 44.

For example, an oxide semiconductor film can be used as the oxide film404.

An oxide semiconductor film may be in a non-single-crystal state, forexample. The non-single-crystal state is, for example, structured by atleast one of c-axis aligned crystal (CAAC), polycrystal, microcrystal,and an amorphous part. The density of defect states of an amorphous partis higher than those of microcrystal and CAAC. The density of defectstates of microcrystal is higher than that of CAAC. Note that an oxidesemiconductor including CAAC is referred to as a CAAC-OS (c-axis alignedcrystalline oxide semiconductor).

For example, the oxide semiconductor film may include a CAAC-OS. TheCAAC-OS includes, for example, an oxide semiconductor in which c-axesare aligned, and a-axes and/or b-axes are not macroscopically aligned.

Embodiment 6. Power Storage Device

As an example of a power storage device, a nonaqueous secondary batterytypified by a lithium-ion secondary battery is described.

[6.1. Positive Electrode]

First, a positive electrode of the power storage device is describedwith reference to FIGS. 17A and 17B.

A positive electrode 6000 includes a positive electrode currentcollector 6001 and a positive electrode active material layer 6002formed over the positive electrode current collector 6001 by a coatingmethod, a CVD method, a sputtering method, or the like, for example.Although an example of providing the positive electrode active materiallayer 6002 on both surfaces of the positive electrode current collector6001 with a sheet shape (or a strip-like shape) is illustrated in FIG.17A, one embodiment of the present invention is not limited to thisexample. The positive electrode active material layer 6002 may beprovided on one of the surfaces of the positive electrode currentcollector 6001. Further, although the positive electrode active materiallayer 6002 is provided entirely over the positive electrode currentcollector 6001 in FIG. 17A, one embodiment of the present invention isnot limited thereto. The positive electrode active material layer 6002may be provided over part of the positive electrode current collector6001. For example, a structure may be employed in which the positiveelectrode active material layer 6002 is not provided in a portion wherethe positive electrode current collector 6001 is connected to a positiveelectrode tab.

The positive electrode current collector 6001 can be formed using amaterial that has high conductivity and is not alloyed with a carrierion of lithium or the like, such as stainless steel, gold, platinum,zinc, iron, copper, aluminum, or titanium, an alloy thereof, or thelike. Alternatively the positive electrode current collector 6001 can beformed using an aluminum alloy to which an element which improves heatresistance, such as silicon, titanium, neodymium, scandium, ormolybdenum, is added. Further alternatively, the positive electrodecurrent collector 6001 may be formed using a metal element which formssilicide by reacting with silicon. Examples of the metal element whichforms silicide by reacting with silicon are zirconium, titanium,hafnium, vanadium, niobium, tantalum, chromium, molybdenum, tungsten,cobalt, and nickel. The positive electrode current collector 6001 canhave a foil shape, a plate (sheet) shape, a net shape, a punching-metalshape, an expanded-metal shape, or the like as appropriate. The positiveelectrode current collector 6001 preferably has a thickness of greaterthan or equal to 10 μm and less than or equal to 30 μm.

FIG. 17B is a schematic view illustrating the longitudinalcross-sectional view of the positive electrode active material layer6002. The positive electrode active material layer 6002 includesparticles of the positive electrode active material 6003, graphene 6004as a conductive additive, and a binder 6005.

Examples of the conductive additive are acetylene black (AB), ketjenblack, graphite (black lead) particles, and carbon nanotubes in additionto graphene described later. Here, the positive electrode activematerial layer 6002 using the graphene 6004 is described as an example.

The positive electrode active material 6003 is in the form of particlesmade of secondary particles having average particle diameter andparticle diameter distribution, which is obtained in such a way thatmaterial compounds are mixed at a predetermined ratio and baked and theresulting baked product is crushed, granulated, and classified by anappropriate means. For this reason, the positive electrode activematerial 6003 is schematically illustrated as spheres in FIG. 17B;however, the shape of the positive electrode active material 6003 is notlimited to this shape.

As the positive electrode active material 6003, a material into/fromwhich carrier ions such as lithium ions can be inserted and extracted isused.

For example, an olivine-type lithium-containing composite phosphate(General formula: LiMPO₄; M is one or more of Fe(II), Mn(II), Co(II),and Ni(II) can be used. Typical examples of the general formula LiMPO₄we lithium compounds such as LiFePO₄, LiNiPO₄, LiCoPO₄, LiMnPO₄,LiFe_(a)Ni_(b)PO₄, LiFe_(a)Co_(b)PO₄, LiFe_(a)Mn_(b)PO₄,LiNi_(a)Co_(b)PO₄, LiNi_(a)Mn_(b)PO₄ (a+b≤1, 0<a<1, and 0<b<1),LiFe_(c)Ni_(d)Co_(e)PO₄, LiFe_(c)Ni_(d)Mn_(e)PO₄,LiNi_(c)Co_(d)Mn_(e)PO₄ (c+d+e≤1, 0<c<1, 0<d<1, and 0<e<1), andLiFe_(f)Ni_(g)Co_(h)Mn_(i)PO₄ (f+g+h+i≤1, 0<f<1, 0<g<1, 0<h<1, and0<i<1).

Alternatively, a lithium-containing composite silicate such asL(_(2-j))MSiO₄ (general formula) (M is one or more of Fe(II), Mn(II),Co(II), and Ni(II); 0≤j≤2)) can be used. Typical examples of the generalformula Li(_(2-j))MSiO₄ are compounds such as Li(_(2-j))FeSiO₄,Li(_(2-j))NiSiO₄, Li(_(2-j))CoSiO₄, Li(_(2-j))MnSiO₄,Li(_(2-j))Fe_(k)Ni_(l)SiO₄, Li(_(2-j))Fe_(k)Co_(l)SiO₄,Li(_(2-j))Fe_(k)Mn_(l)SiO₄, Li(_(2-j))Ni_(k)Co_(l)SiO₄,Li(_(2-j))Ni_(k)Mn_(l)SiO₄ (k+l≤1, 0<k<<1, and 0<l<1),Li(_(2-j))Fe_(m)Ni_(n)Co_(q)SiO₄, Li(_(2-j))Fe_(m)Ni_(n)Mn_(q)SiO₄,Li(_(2-j))Ni_(m)Co_(n)Mn_(q)SiO₄ (m+n+q≤1, 0<<1, 0<n<1, and 0<q<1), andLi(_(2-j))Fe_(r)Ni_(s)Co_(t)Mn_(u)SiO₄ (r+s+t+u≤1, 0<r<1, 0<s<1, 0<t<1,and 0<u<1).

Further alternatively, any of the following lithium-containing materialswith a layered rock-salt crystal structure can be use: lithium cobaltoxide (LiCoO₂); LNiO₂; LiMnO₂; Li₂MnO₃; a NiCo-containing material(general formula: LiNi_(x)Co_(1-x)O₂ (0<x<1)) such asLiNi_(0.8)Co_(0.2)O₂; a NiMn-containing material (general formula:LiNi_(x)Mn_(1-x)O₂ (0<x<1)) such as LiNi_(0.5)Mn_(0.5)O₂; and aNiMnCo-containing material (also referred to as NMC) (general formula:LiNi_(x)Mn_(y)Co_(1-x-y)O₂ (x>0, y>0, and x+y<1)) such asLiNi_(1/3)Mn_(1/3)Co_(1/3)O₂.

Still further alternatively, for the positive electrode active material6003, any of other various compounds, such as an active material havinga spinel crystal structure (e.g., LiMn₂O₄) and an active material havingan inverse spinel crystal structure (e.g., LiMVO₄) can be used.

In the case where carrier ions are alkali metal ions other than lithiumions or alkaline-earth metal ions, the following may be used as thepositive electrode active material 6003: a compound or oxide which isobtained by substituting an alkali metal (e.g., sodium or potassium) oran alkaline-earth metal (e.g., calcium, strontium, barium, beryllium, ormagnesium) for lithium in any of the above-described compounds oroxides.

Note that although not illustrated, a carbon layer may be provided on asurface of the positive electrode active material 6003. With a carbonlayer, conductivity of an electrode can be increased. The positiveelectrode active material 6003 can be coated with the carbon layer bymixing a carbohydrate such as glucose at the time of baking the positiveelectrode active material.

In addition, the graphene 6004 which is added to the positive electrodeactive material layer 6002 as a conductive additive can be formed byperforming reduction treatment on graphene oxide.

Here, graphene in this specification includes single-layer graphene ormultilayer graphene including two to a hundred layers. The single-layergraphene refers to a sheet of one atomic layer of carbon moleculeshaving x bonds. Further, graphene oxide in this specification refers toa compound formed by oxidation of graphene. When graphene oxide isreduced to form graphene, oxygen contained in the graphene oxide is notentirely extracted and part of the oxygen remains in the graphene insome cases. When the graphene contains oxygen, the ratio of the oxygenmeasured by X-ray photoelectron spectroscopy (XPS) in the graphene ishigher than or equal to 2 atomic % and lower than or equal to 20 atomic%, preferably higher than or equal to 3 atomic % and lower than or equalto 15 atomic %.

In the case of multilayer graphene including graphene obtained byreducing graphene oxide, the interlayer distance of the graphene isgreater than or equal to 0.34 nm and less than or equal to 0.5 nm,preferably greater than or equal to 0.38 nm and less than or equal to0.42 nm, further preferably greater than or equal to 0.39 nm and lessthan or equal to 0.41 nm. In general graphite, the interlayer distanceof single-layer graphene is 0.34 nm. Since the interlayer distance inthe graphene used for the power storage device of one embodiment of thepresent invention is longer than that in the general graphite, carrierions can easily transfer between layers of the graphene in themultilayer graphene.

Graphene oxide can be formed by an oxidation method called a Hummersmethod, for example.

The Hummers method is as follows: a sulfuric acid solution of potassiumpermanganate, a hydrogen peroxide solution, and the like are mixed intoa graphite powder to cause oxidation reaction; thus, a dispersion liquidincluding graphite oxide is formed. Through the oxidation of carbon ingraphite, functional groups such as an epoxy group, a carbonyl group, acarboxyl group, or a hydroxyl group are bonded in the graphite oxide.Accordingly, the interlayer distance between a plurality of pieces ofgraphene in the graphite oxide is longer than that in the graphite, sothat the graphite oxide can be easily separated into thin pieces byinterlayer separation. Then, ultrasonic vibration is applied to themixed solution containing the graphite oxide, so that the graphite oxidewhose interlayer distance is long can be cleaved to separate grapheneoxide and to form a dispersion liquid containing graphene oxide. Thesolvent is removed from the dispersion liquid containing the grapheneoxide, so that powdery graphene oxide can be obtained.

Note that the method forming graphene oxide is not limited to theHummers method using a sulfuric acid solution of potassium permanganate;for example, the Hummers method using nitric acid, potassium chlorate,nitric acid sodium, potassium permanganate, or the like or a method forforming graphene oxide that does not use the Hummers method may beemployed as appropriate.

Graphite oxide may be separated into thin pieces by application ofultrasonic vibration, by irradiation with microwaves, radio waves, orthermal plasma, or by application of physical stress.

The formed graphene oxide includes an epoxy group, a carbonyl group, acarboxyl group, a hydroxyl group, or the like. Oxygen in a functionalgroup of graphene oxide is negatively charged in a polar solventtypified by NMP (also referred to as N-methylpyrrolidone,1-methyl-2-pyrrolidone, N-methyl-2-pyrrolidone, or the like); therefore,while interacting with NMP, the graphene oxide repels other grapheneoxide and is hardly aggregated. For this reason, in a polar solvent,graphene oxide can be easily dispersed uniformly.

The length of one side (also referred to as a flake size) of thegraphene oxide is greater than or equal to 50 nm and less than or equalto 100 μm, preferably greater than or equal to 800 nm and less than orequal to 20 μm.

As illustrated in the cross-sectional view of the positive electrodeactive material layer 6002 in FIG. 17B, the plurality of particles ofthe positive electrode active material 6003 is coated with a pluralityof pieces of the graphene 6004. The sheet-like graphene 6004 isconnected to the plurality of particles of the positive electrode activematerial 6003. In particular, since the graphene 6004 has the sheetshape, surface contact can be made in such a way that part of surfacesof the particles of the positive electrode active material 6003 arewrapped with the graphene 6004. Unlike a conductive additive in the formof particles such as acetylene black, which makes point contact with apositive electrode active material, the graphene 6004 is capable ofsurface contact with low contact resistance; accordingly, the electronconductivity between the particles of the positive electrode activematerial 6003 and the graphene 6004 can be improved without an increasein the amount of a conductive additive.

Further, surface contact is made between the plurality of pieces of thegraphene 6004. This is because graphene oxide with extremely highdispersibility in a polar solvent is used for the formation of thegraphene 6004. The solvent is removed by volatilization from adispersion medium in which the graphene oxide is uniformly dispersed,and the graphene oxide is reduced to give graphene; hence, pieces of thegraphene 6004 remaining in the positive electrode active material layer6002 are partly overlapped with each other and dispersed such thatsurface contact is made, thereby forming a path for electron conduction.

Further, some pieces of the graphene 6004 are arrangedthree-dimensionally between the particles of the positive electrodeactive material 6003. Furthermore, the graphene 6004 is an extremelythin film (sheet) made of a single layer of carbon molecules or stackedlayers thereof and hence is in contact with part of the surfaces of theparticles of the positive electrode active material 6003 in such a wayas to cover and fit these surfaces. A portion of the graphene 6004 whichis not in contact with the particles of the positive electrode activematerial 6003 is warped between the plurality of particles of thepositive electrode active material 6003 and crimped or stretched.

Consequently, a network for electron conduction is formed in thepositive electrode 6000 by the pieces of the graphene 6004. Therefore, apath for electric conduction between the particles of the positiveelectrode active material 6003 is maintained. As described above, in thecase of the coating method, the grapheme which is obtained by reducingthe dispersion medium in which the graphene oxide is uniformly dispersedafter coating and drying is used as a conductive additive, which enablesthe positive electrode active material layer 6002 to have high electronconductivity.

The ratio of the positive electrode active material 6003 in the positiveelectrode active material layer 6002 can be increased because it is notnecessary to increase the added amount of the conductive additive inorder to increase contact points between the positive electrode activematerial 6003 and the graphene 6004. Accordingly, the discharge capacityof the secondary battery can be increased.

The average particle diameter of the primary particle of the positiveelectrode active material 6003 is less than or equal to 500 nm,preferably greater than or equal to 50 nm and less than or equal to 500nm. To make surface contact with the plurality of particles of thepositive electrode active material 6003, the length of one side of thegraphene 6004 is greater than or equal to 50 nm and less than or equalto 100 μm, preferably greater than or equal to 800 nm and less than orequal to 20 μm.

Examples of the binder included in the positive electrode activematerial layer 6002 are polyimide, polytetrafluoroethylene, polyvinylchloride, ethylene-propylene-diene polymer, styrene-butadiene rubber,acrylonitrile-butadiene rubber, fluorine rubber, polyvinyl acetate,polymethyl methacrylate, polyethylene, and nitrocellulose, in additionto polyvinylidene fluoride (PVDF) which is a typical example.

The above-described positive electrode active material layer 6002preferably includes the positive electrode active material 6003 atgreater than or equal to 90 wt % and less than or equal to 94 wt %, thegraphene 6004 as the conductive additive at greater than or equal to 1wt % and less than or equal to 5 wt %, and the binder at greater than orequal to 1 wt % and less than or equal to 5 wt % with respect to thetotal weight of the positive electrode active material layer 6002.

[6.2. Negative Electrode]

Next, a negative electrode of the power storage device is described withreference to FIGS. 18A and 18B.

A negative electrode 6100 includes a negative electrode currentcollector 6101 and a negative electrode active material layer 6102formed over the negative electrode current collector 6101 by a coatingmethod, a CVD method, a puttering method, or the like, for example.Although an example of providing the negative electrode active materiallayer 6102 on both surfaces of the negative electrode current collector6101 with a sheet shape (or a strip-like shape) is illustrated in FIG.18A, one embodiment of the present invention is not limited to thisexample. The negative electrode active material layer 6102 may beprovided on one of the surfaces of the negative electrode currentcollector 6101. Further, although the negative electrode active materiallayer 6102 is provided entirely over the negative electrode currentcollector 6101 in FIG. 18A, one embodiment of the present invention isnot limited thereto. The negative electrode active material layer 6102may be provided over part of the negative electrode current collector6101. For example, a structure may be employed in which the negativeelectrode active material layer 6102 is not provided in a portion wherethe negative electrode current collector 6101 is connected to a negativeelectrode tab.

The negative electrode current collector 6101 can be formed using amaterial which has high conductivity and is not alloyed with carrierions such as lithium ions, such as stainless steel, gold, platinum,zinc, iron, copper, or titanium, an alloy thereof or the like.Alternatively, the negative electrode current collector 6101 may beformed using a metal element which forms silicide by reacting withsilicon. Examples of the metal element which forms silicide by reactingwith silicon are zirconium, titanium, hafnium, vanadium, niobium,tantalum, chromium, molybdenum, tungsten, cobalt, and nickel. Thenegative electrode current collector 6101 can have a foil shape, a plate(sheet) shape, a net shape, a punching-metal shape, an expanded-metalshape, or the like as appropriate. The negative electrode currentcollector 6101 preferably has a thickness of greater than or equal to 10μm and less than or equal to 30 μm.

FIG. 183 is a schematic view of part of a cross-section of the negativeelectrode active material layer 6102. Although an example of thenegative electrode active material layer 6102 including the negativeelectrode active material 6103 and the binder 6105 is shown here, oneembodiment of the present invention is not limited to this example. Itis sufficient that the negative electrode active material layer 6102includes at least the negative electrode active material 6103.

There is no particular limitation on the material of the negativeelectrode active material 6103 as long as it is a material with which ametal can be dissolved and precipitated or a material into/from whichmetal ions can be inserted and extracted. Other than a lithium metal,graphite, which is a carbon material generally used in the field ofpower storage, can also be used as the negative electrode activematerial 6103. Examples of graphite are low crystalline carbon such assoft carbon and hard carbon and high crystalline carbon such as naturalgraphite, kish graphite, pyrolytic carbon, mesophase pitch based carbonfiber, meso-carbon microbeads (MCMB), mesophase pitches, andpetroleum-based or coal-based coke.

As the negative electrode active material 6103, other than the abovecarbon materials, an alloy-based material which enables charge-dischargereaction by alloying and dealloying reaction with carrier ions can beused. In the case where carrier ions are lithium ions, for example, amaterial containing at least one of Mg, Ca, Al, Si, Ge, Sn, Pb, As, Sb,Bi, Ag, Au, Zn, Cd, Hg, In, etc. can be used as the alloy-basedmaterial. Such metals have higher capacity than graphite. In particular,silicon has a significantly high theoretical capacity of 4200 mAh/g. Forthis reason, silicon is preferably used as the negative electrode activematerial 6103.

Although the negative electrode active material 6103 is illustrated as aparticulate substance in FIG. 18B, the shape of the negative electrodeactive material 6103 is not limited thereto. The negative electrodeactive material 6103 can have a given shape such as a plate shape, a rodshape, a cylindrical shape, a powder shape, or a flake shape. Further,the negative electrode active material 6103 may have a three-dimensionalshape such as unevenness on a surface with a plate shape, fineunevenness on a surface, or a porous shape.

The negative electrode active material layer 6102 may be formed by acoating method in such a manner that a conductive additive (notillustrated) and the binder 6105 are added to the negative electrodeactive material 6103 to form a negative electrode paste and the negativeelectrode paste is applied onto the negative electrode current collector6101 and dried.

Note that the negative electrode active material layer 6102 may bepredoped with lithium. As a predoping method, a sputtering method may beused to form a lithium layer on a surface of the negative electrodeactive material layer 6102. Alternatively, the negative electrode activematerial layer 6102 can be predoped with lithium by providing lithiumfoil on the surface thereof.

Further, graphene (not illustrated) is preferably formed on a surface ofthe negative electrode active material 6103. In the case of usingsilicon as the negative electrode active material 6103, the volume ofsilicon is greatly changed due to occlusion and release of carrier ionsin charge-discharge cycles. Therefore, adhesion between the negativeelectrode current collector 6101 and the negative electrode activematerial layer 6102 is decreased, resulting in degradation of batterycharacteristics caused by charging and discharging. In view of this,graphene is preferably formed on a surface of the negative electrodeactive material 6103 containing silicon because even when the volume ofsilicon is changed in charge-discharge cycles, decrease in adhesionbetween the negative electrode current collector 6101 and the negativeelectrode active material layer 6102 can be regulated, which makes itpossible to reduce degradation of battery characteristics.

Graphene formed on the surface of the negative electrode active material6103 can be formed by reducing graphene oxide in a similar manner tothat of the method for forming the positive electrode. As the grapheneoxide, the above-described graphene oxide can be used.

Further, a coating film 6104 of oxide or the like may be formed on thesurface of the negative electrode active material 6103. A coating film(solid electrolyte interphase) formed by decomposition of an electrolytesolution in charging cannot release electric charges used at the time offorming the coting film, and therefore forms irreversible capacity. Incontrast, the coating film 6104 of oxide or the like provided on thesurface of the negative electrode active material 6103 in advance canreduce or prevent generation of irreversible capacity.

As the coating film 6104 coating the negative electrode active material6103, an oxide film of any one of niobium, titanium, vanadium, tantalum,tungsten, zirconium, molybdenum, hafnium, chromium, aluminum, andsilicon or an oxide film containing any one of these elements andlithium can be used. The coating film 6104 is denser than a conventionalcoating film formed on a surface of a negative electrode due to adecomposition product of an electrolyte solution.

For example, niobium oxide (Nb₂O₅) has a low electric conductivity of10⁻⁹ S/cm and a high insulating property. For this reason, a niobiumoxide film inhibits electrochemical decomposition reaction between thenegative electrode active material and the electrolyte solution. On theother hand, niobium oxide has a lithium diffusion coefficient of 10⁻⁹cm²/sec and high lithium ion conductivity. Therefore, niobium oxide cantransmit lithium ions.

A sol-gel method can be used to coat the negative electrode activematerial 6103 with the coating film 6104, for example. The sol-gelmethod is a method for forming a thin film in such a manner that asolution of metal alkoxide, a metal salt, or the like is changed into agel, which has lost its fluidity, by hydrolysis reaction andpolycondensation reaction and the gel is baked. Since a thin film isformed from a liquid phase in the sol-gel method, raw materials can bemixed uniformly on the molecular scale. For this reason, by adding anegative electrode active material such as graphite to a raw material ofthe metal oxide film which is a solvent, the active material can beeasily dispersed into the gel. In such a manner, the coating film 6104can be formed on the surface of the negative electrode active material6103.

A decrease in the capacity of the power storage device can be preventedby using the coating film 6104.

[6.3. Electrolyte Solution]

As a solvent for the electrolyte solution used in the power storagedevice, an aprotic organic solvent is preferably used. For example, oneof ethylene carbonate (EC), propylene carbonate (PC), butylenecarbonate, chloroethylene carbonate, vinylene carbonate,γ-butyrolactone, γ-valerolactone, dimethyl carbonate (DMC), diethylcarbonate (DEC), ethyl methyl carbonate (BMC), methyl formate, methylacetate, methyl butyrate, 1,3-dioxane, 1,4-dioxane, dimethoxyethane(DME), dimethyl sulfoxide, diethyl ether, methyl diglyme, acetonitrile,benzonitrile, tetrahydrofuran, sulfolane, and sultone can be used, ortwo or more of these solvents can be used in an appropriate combinationin an appropriate ratio.

With the use of a gelled high-molecular material as the solvent for theelectrolyte solution, safety against liquid leakage and the like isimproved. Further, the power storage device can be thinner and morelightweight. Typical examples of gelled high-molecular materials are asilicone gel, an acrylic gel, an acrylonitrile gel, polyethylene oxide,polypropylene oxide, and a fluorine-based polymer.

Alternatively, the use of one or more of ionic liquids (room temperaturemolten salts) which are less likely to burn and volatilize as thesolvent for the electrolyte solution can prevent the power storagedevice from exploding or catching fire even when the power storagedevice internally shorts out or the internal temperature increases dueto overcharging or the like.

In the case of using a lithium ion as a carrier ion, examples of anelectrolyte dissolved in the above-described solvent are one of lithiumsalts such as LiPF₆, LiClO₄, LiAsF₆, LiBF₄, LiAlCl₄, LiSCN, LiBr, LiI,Li₂SO₄, Li₂B₁₀Cl₁₀, Li₂B₁₂Cl₁₂, LiCF₃SO₃, LiC₄F₉SO₃, LiC(CF₃SO₂)₃,LiC(C₂F₅SO₂)₃, LiN(CF₃SO₂)₂, LiN(C₄F₉SO₂)(CF₃SO₂), and LiN(C₂F₅SO₂)₂, ortwo or more of these lithium salts in an appropriate combination in anappropriate ratio.

[6.4. Separator]

As the separator of the power storage device, a porous insulator such ascellulose, polypropylene (PP), polyethylene (PB), polybutene, nylon,polyester, polysulfone, polyacrylonitrile, polyvinylidene fluoride, ortetrafluoroethylene can be used. Further, nonwoven fabric of a glassfiber or the like, or a diaphragm in which a glass fiber and a polymerfiber are mixed may also be used.

[6.5. Nonaqueous Secondary Battery]

Next, structures of nonaqueous secondary batteries are described withreference to FIGS. 19A to 19C and FIGS. 20A and 20B.

[6.5.1. Coin-Type Secondary Battery]

FIG. 19A is an external view of a coin-type (single-layer flat type)lithium-ion secondary battery, including a cross-sectional view of thelaminated lithium-ion secondary battery.

In a coin-type secondary battery 950, a positive electrode can 951serving also as a positive electrode terminal and a negative electrodecan 952 serving also as a negative electrode terminal are insulated andscaled with a gasket 953 formed of polypropylene or the like. A positiveelectrode 954 includes a positive electrode current collector 955 and apositive electrode active material layer 956 which is provided to be incontact with the positive electrode current collector 955. A negativeelectrode 957 includes a negative electrode current collector 958 and anegative electrode active material layer 959 which is provided to be incontact with the negative electrode current collector 958. A separator960 and an electrolyte solution (not illustrated) are provided betweenthe positive electrode active material layer 956 and the negativeelectrode active material layer 959.

The negative electrode 957 includes the negative electrode activematerial layer 959 over the negative electrode current collector 958.The positive electrode 954 includes the positive electrode activematerial layer 956 over the positive electrode current collector 955.

As the positive electrode 954, the negative electrode 957, the separator960, and the electrolyte solution, the above-described materials can beused.

For the positive electrode can 951 and the negative electrode can 952, ametal having corrosion resistance to the electrolyte solution, such asnickel, aluminum, or titanium, an alloy of such a metal, or an alloy ofsuch a metal and another metal (e.g., stainless steel) can be used.Alternatively, the positive electrode can 951 and the negative electrodecan 952 are preferably covered with nickel, aluminum, or the like inorder to prevent corrosion by the electrolyte solution. The positiveelectrode can 951 and the negative electrode can 952 are electricallyconnected to the positive electrode 954 and the negative electrode 957,respectively.

The negative electrode 957, the positive electrode 954, and theseparator 960 are immersed in the electrolyte solution. Then, asillustrated in FIG. 19A, the positive electrode can 951, the positiveelectrode 954, the separator 960, the negative electrode 957, and thenegative electrode can 952 are stacked in this order with the positiveelectrode can 951 positioned at the bottom, and the positive electrodecan 951 and the negative electrode can 952 are subjected to pressurebonding with the gasket 953 provided therebetween. In such a manner, thecoin-type secondary battery 950 is manufactured.

[6.5.2. Thin Secondary Battery]

Next, an example of a thin secondary battery will be described withreference to FIG. 19B. In FIG. 19B, a structure inside the laminatedsecondary battery is partly exposed for convenience.

A thin secondary battery 970 illustrated in FIG. 19B includes a positiveelectrode 973 including a positive electrode current collector 971 and apositive electrode active material layer 972, a negative electrode 976including a negative electrode current collector 974 and a negativeelectrode active material layer 975, a separator 977, an electrolytesolution (not illustrated), and an exterior body 978. The separator 977is provided between the positive electrode 973 and the negativeelectrode 976 in the exterior body 978. The exterior body 978 is filledwith the electrolyte solution. Although one positive electrode 973, onenegative electrode 976, and one separator 977 are used in FIG. 19B, thesecondary battery may have a stacked-layer structure in which positiveelectrodes, negative electrodes, and separators are alternately stacked.

For the positive electrode, the negative electrode, the separator, andthe electrolyte solution (an electrolyte and a solvent), theabove-described members can be used.

In the thin secondary battery 970 illustrated in FIG. 19B, the positiveelectrode current collector 971 and the negative electrode currentcollector 974 also serve as terminals (tabs) for an electrical contactwith the outside. For this reason, the positive electrode currentcollector 971 and the negative electrode current collector 974 each havea part exposed outside the exterior body 978.

As the exterior body 978 in the thin secondary battery 970, for example,a stacked film having a three-layer structure in which a highly flexiblemetal thin film of aluminum, stainless steel, copper, nickel, or thelike is provided over a film formed of a material such as polyethylene,polypropylene, polycarbonate, ionomer, or polyamide, and an insulatingsynthetic resin film of a polyamide-based resin, a polyester-basedresin, or the like is provided as the outer surface of the exterior bodyover the metal thin film can be used. With such a three-layer structure,permeation of the electrolyte solution and a gas can be blocked and aninsulating property and resistance to the electrolyte solution can beobtained.

[6.5.3. Cylindrical Secondary Battery]

Next, an example of a cylindrical secondary battery is described withreference to FIGS. 20A and 20B. As illustrated in FIG. 20A, acylindrical secondary battery 980 includes a positive electrode cap(battery lid) 981 on the top surface and a battery can (outer can) 982on the side surface and bottom surface. The positive electrode cap 981and the battery can (outer can) 982 are insulated by the gasket 990(insulating packing).

FIG. 20B is a schematic view of a cross-section of the cylindricalsecondary battery. Inside the battery can 982 having a hollowcylindrical shape, a battery element in which a strip-like positiveelectrode 984 and a strip-like negative electrode 986 are wound with astripe-like separator 985 provided therebetween is provided. Althoughnot illustrated, the battery element is wound around a center pin. Thebattery can 982 is closed at one end and opened at the other end.

For the positive electrode 984, the negative electrode 986, and theseparator 985, the above-described members can be used.

For the battery can 982, a metal having corrosion resistance to anelectrolyte solution, such as nickel, aluminum, or titanium, an alloy ofsuch a metal, or an alloy of such a metal and another metal (e.g.,stainless steel or the like) can be used. Alternatively, the battery can982 is preferably covered with nickel, aluminum, or the like in order toprevent corrosion caused by the electrolyte solution. Inside the batterycan 982, the battery element in which the positive electrode, thenegative electrode, and the separator are wound is provided between apair of insulating plates 988 and 989 which face each other.

Further, an electrolyte solution (not illustrated) is injected insidethe battery can 982 in which the battery element is provided. For theelectrolyte solution, the above-described electrolyte and solvent can beused.

Since the positive electrode 984 and the negative electrode 986 of thecylindrical secondary battery are wound, active material layers areformed on both sides of the current collectors. A positive electrodeterminal (positive electrode current collecting lead) 983 is connectedto the positive electrode 984, and a negative electrode terminal(negative electrode current collecting lead) 987 is connected to thenegative electrode 986. Both the positive electrode terminal 983 and thenegative electrode terminal 987 can be formed using a metal materialsuch as aluminum. The positive electrode terminal 983 and the negativeelectrode terminal 987 are resistance-welded to a safety valve mechanism992 and the bottom of the battery can 982, respectively. The safetyvalve mechanism 992 is electrically connected to the positive electrodecap 981 through a positive temperature coefficient (PTC) element 991.The safety valve mechanism 992 cuts off electrical connection betweenthe positive electrode cap 981 and the positive electrode 984 when theinternal pressure of the battery increases and exceeds a predeterminedthreshold value. The PTC element 991 is a heat sensitive resistor whoseresistance increases as temperature rises, and controls the amount ofcurrent by increase in resistance to prevent abnormal heat generation.Barium titanate (BaTiO₃)-based semiconductor ceramic or the like can beused for the PTC element.

[6.5.4. Rectangular Secondary Battery]

Next, an example of a rectangular secondary battery is described withreference to FIG. 19C. A wound body 993 illustrated in FIG. 19C includesa negative electrode 994, a positive electrode 995, and a separator 996.The wound body 993 is obtained by winding a sheet of a stack in whichthe negative electrode 994 overlaps with the positive electrode 995 withthe separator 996 provided therebetween. The wound body 993 is coveredwith a rectangular scaled can or the like; thus, a rectangular secondarybattery is manufactured. Note that the number of stacks each includingthe negative electrode 994, the positive electrode 995, and theseparator 996 may be determined as appropriate depending on capacity andan element volume which are required.

As in the cylindrical secondary battery, the negative electrode 994 isconnected to a negative electrode tab (not illustrated) through one of aterminal 997 and a terminal 998, and the positive electrode 995 isconnected to a positive electrode tab (not illustrated) through theother of the terminal 997 and the terminal 998. Surrounding structuressuch as a safety valve mechanism are similar to those in the cylindricalsecondary battery.

As described above, although the coin-type secondary battery, the thin(laminated) secondary battery, the cylindrical secondary battery, andthe rectangular secondary battery are described as examples of thesecondary battery, secondary batteries having other shapes can be used.Further, a structure in which a plurality of positive electrodes, aplurality of negative electrodes, and a plurality of separators arestacked or wound may be employed.

[6.6. Lithium-Ion Capacitor]

Next, a lithium-ion capacitor, which is an example of a power storagedevice, will be described.

A lithium-ion capacitor is a hybrid capacitor which combines a positiveelectrode of an electric double layer capacitor (EDLC) and a negativeelectrode of a lithium-ion secondary battery using a carbon material,and also an asymmetric capacitor in which the principles of powerstorage are different between the positive electrode and the negativeelectrode. The positive electrode enables charge and discharge by aphysical action making use of an electrical double layer, whereas thenegative electrode enables charge and discharge by a chemical action oflithium. With the use of a negative electrode in which lithium isoccluded in advance as the carbon material or the like that is anegative electrode active material, the lithium-ion capacitor can haveenergy density dramatically higher than that of a conventionalelectrical double layer capacitor including a negative electrode usingactive carbon.

In a lithium-ion capacitor, instead of a positive electrode activematerial layer in a lithium-ion secondary battery, a material that canreversibly adsorb at least one of lithium ions and anions is used.Examples of such a material include active carbon, a conductive highmolecule, a polyacenenic semiconductor (PAS), and the like.

The lithium-ion capacitor has high efficiency of charge and discharge,capability of rapid charge and discharge, and a long life even when itis repeatedly used.

Such a lithium-ion capacitor can be used in a power storage device ofone embodiment of the present invention. Thus, generation ofirreversible capacity is reduced, so that a power storage device havingimproved cycle performance can be manufactured.

Embodiment 7. Power Storage System

A structural example of a power storage system will be described.

The structural example of the power storage system is illustrated inFIGS. 21A and 21B. The power storage system illustrated in FIG. 21Aincludes a plurality of power storage elements 810 and a circuitsubstrate 850 in a housing 800.

As the power storage elements 810, any of the power storage devicesdescribed with reference to FIGS. 17A and 17B, FIGS. 18A and 18B, FIGS.19A to 19C, and FIGS. 20A and 20B can be used.

The circuit substrate 850 includes the control system described withreference to FIG. 7 including a chip 851, for example. The chip 851 is,for example, the semiconductor circuit 246 shown in FIG. 7. In addition,the circuit substrate 850 is connected to a connector 852 that isconnected to an external device. The circuit substrate 850 is connectedto, for example, a power supply or a load, via the connector 852.

The circuit substrate 850 is, for example, a printed circuit board(PCB). When a printed circuit board is used as the circuit board 850,electronic components such as a resistor, a capacitor, a coil (aninductor), and a semiconductor integrated circuit (IC) are mounted overthe printed circuit board and connected, whereby the control system canbe formed. As well as the above-described electronic components, avariety of components, for example, a temperature sensing element suchas a thermistor, a fuse, a filter, a crystal oscillator, and anelectromagnetic compatibility (EMC) component can be mounted.

Here, as the above semiconductor integrated circuit (IC), a circuitincluding a transistor can be used. Thus, power consumption of thecontrol system can be reduced significantly.

Further, as illustrated in FIG. 21B, the circuit substrate 850 includesa plurality of connection terminals 811 a and a plurality of connectionterminals 811 b. One connection terminal 811 a and one connectionterminal 811 b are provided for each power storage element 810. Theconnection terminal 811 a is connected to a connection terminal 812 a ofthe corresponding power storage element 810. The connection terminal 811b is connected to a connection terminal 812 b of the corresponding powerstorage element 810. At this time, the power storage element 810 isconnected to the control system provided in the circuit substrate 850through the connection terminal 811 a and the connection terminal 811 b.

Note that as illustrated in FIG. 22, an antenna 860 may be provided inthe housing 800.

The antenna 860 can be used for transmitting and receiving electricpower and a signal to/from the outside of the plurality of power storageelements 810, for example. The antenna 860 is electrically connected tothe circuit substrate 850 to allow the electric circuit to control thetransmission and reception of electric power and a signal to/from theoutside.

A variety of antennas may be provided or a structure where an antenna isnot provided may be employed.

In FIG. 22, the antenna 860 has a coil shape; however, withoutlimitation thereon, a linear antenna or a flat plate antenna may beused, for example. Further, a planar antenna, an aperture antenna, atraveling-wave antenna, an EH antenna, a magnetic-field antenna, or adielectric antenna may be used.

Note that an electromagnetic induction method, a magnetic resonancemethod, an electric wave method, or the like can be used fortransmitting and receiving electric power wirelessly (also referred toas contactless power transmission, non-contact power transmission,wireless power supply, or the like).

In addition, the housing 800 may have a structure having a function ofpreventing shielding of an electric field or a magnetic field due to thepower storage elements, for example. In this case, a magnetic materialcan be used for the housing 800, for example.

As illustrated in FIGS. 21A and 21B and FIG. 22, the power storagesystem can be formed. With this structure, deterioration of the powerstorage devices in the power storage system can be prevented, forexample.

Embodiment 8. Electrical Appliance

The power storage device of one embodiment of the present invention canbe used for a variety of electrical appliances.

[8.1. Range of Electrical Appliances]

Here, “electrical appliances” refer to all general industrial productsincluding portions which operate by electric power. Electricalappliances are not limited to consumer products such as home electricalproducts and also include products for various uses such as businessuse, industrial use, and military use in their category.

[8.2. Examples of Electrical Appliance]

Examples of electrical appliances each using the power storage device ofone embodiment of the present invention are as follows: display devicesof televisions, monitors, and the like, lighting devices, desktoppersonal computers, laptop personal computers, word processors, imagereproduction devices which reproduce still images or moving imagesstored in recording media such as digital versatile discs (DVDs),portable or stationary music reproduction devices such as compact disc(CD) players and digital audio players, portable or stationary radioreceivers, recording reproduction devices such as tape recorders and ICrecorders (voice recorders), headphone stereos, stereos, remotecontrols, clocks such as table clocks and wall clocks, cordless phonehandsets, transceivers, mobile phones, car phones, portable orstationary game machines, pedometers, calculators, portable informationterminals, electronic notebooks, e-book readers, electronic translators,audio input devices such as microphones, cameras such as still camerasand video cameras, toys, electric shavers, electric toothbrushes,high-frequency heating appliances such as microwave ovens, electric ricecookers, electric washing machines, electric vacuum cleaners, waterheaters, electric fans, hair dryers, air-conditioning systems such ashumidifiers, dehumidifiers, and air conditioners, dishwashers, dishdryers, clothes dryers, futon dryers, electric refrigerators, electricfreezers, electric refrigerator-freezers, freezers for preserving DNA,flashlights, electric power tools, smoke detectors, and a healthequipment and a medical equipment such as hearing aids, cardiacpacemakers, portable X-ray equipments, radiation counters, electricmassagers, and dialyzers. The examples also include industrial equipmentsuch as guide lights, traffic lights, meters such as gas meters andwater meters, belt conveyors, elevators, escalators, automatic vendingmachines, automatic ticket machine, cash dispensers (CD), automatedteller machines (ATM), digital signage, industrial robots, radio relaystations, mobile phone base stations, power storage systems, and powerstorage device for leveling the amount of power supply and smart grid.In addition, moving objects (transporters) driven by an electric motorusing electric power from a power storage device are also included inthe category of the electrical appliances. Examples of the movingobjects are electric vehicles (EV), hybrid electric vehicles (HEV) whichinclude both an internal-combustion engine and a motor, plug-in hybridelectric vehicles (PHEV), tracked vehicles in which caterpillar tracksare substituted for wheels of these vehicles, agricultural machines,motorized bicycles including motor-assisted bicycles, motorcycles,electric wheelchairs, electric carts, boats or ships, submarines,aircrafts such as fixed-wing aircraft and rotary-wing aircraft, rockets,artificial satellites, space probes, planetary probes, and spacecrafts.

In the electrical appliances, the power storage device of one embodimentof the present invention can be used as a main power supply for almostthe whole power consumption. Alternatively, in the electricalappliances, the power storage device of one embodiment of the presentinvention can be used as an uninterruptible power source which cansupply power to the electrical appliances when the supply of power fromthe main power supply or a commercial power supply is stopped. Furtheralternatively, in the electrical appliances, the power storage device ofone embodiment of the present invention can be used as an auxiliarypower supply for supplying electric power to the electrical appliancesat the same time as the power supply from the main power supply or acommercial power supply.

[8.3. Example of Electric Power Network]

The electrical appliances may each include a power storage device, ormay be connected wirelessly or with a wiring to at least one powerstorage device and a control device that controls the electric powersystem to form an electric network (electric power network). Theelectric network controlled by the control device can improve usageefficiency of electric power in the whole network.

FIG. 23A illustrates an example of a home energy management system(HEMS) in which a plurality of home appliances, a control device, apower storage device, and the like are connected in a house. Such asystem makes it possible to check easily the power consumption of thewhole house. In addition, the plurality of home appliances can beoperated with a remote control. Further, automatic control of the homeappliances with a sensor or the control device can also contribute tolow power consumption.

A panelboard 8003 set in a house 8000 is connected to an electric powersystem 8001 through a service wire 8002. The panelboard 8003 supplies ACpower which is electric power supplied from a commercial power supplythrough the service wire 8002 to each of the plurality of homeappliances. A control device 8004 is connected to the panelboard 8003and also connected to the plurality of home appliances, a power storagesystem 8005, a solar power generation system 8006, and the like.Further, the control device 8004 can also be connected to an electricvehicle 8012 which is parked outside the house 8000 or the like andoperates independently of the panelboard 8003.

The control device 8004 connects the panelboard 8003 to the plurality ofhome appliances to form a network, and controls the plurality of homeappliances connected to the network.

In addition, the control device 8004 is connected to Internet 8011 andthus can be connected to a management server 8013 through the Internet8011. The management server 8013 receives data on the status of electricpower usage of users and therefore can create a database and can providethe users with a variety of services based on the database. Further, asneeded, the management server 8013 can provide the users with data onelectric power charge for a corresponding time zone, for example. On thebasis of the data, the control device 8004 can set an optimized usagepattern in the house 8000.

Examples of the plurality of home appliances are a display device 8007,a lighting device 8008, an air-conditioning system 8009, and an electricrefrigerator 8010 which are illustrated in FIG. 23A. However, theplurality of home appliances are not limited to these examples, andrefer to a variety of electrical appliances which can be set inside ahouse, such as the above-described electrical appliances.

In a display portion of the display device 8007, a semiconductor displaydevice such as a liquid crystal display device, a light-emitting deviceincluding a light-emitting element, e.g., an organic electroluminescent(EL) element, in each pixel, an electrophoretic display device, adigital micromirror device (DMD), a plasma display panel (PDP), or afield emission display (FED) is provided, for example. A display devicefunctioning as a display device for displaying information, such as adisplay device for TV broadcast reception, a personal computer,advertisement, and the like, is included in the category of the displaydevice 8007.

The lighting device 8008 includes an artificial light source whichgenerates light artificially by utilizing electric power in itscategory. Examples of the artificial light source are an incandescentlamp, a discharge lamp such as a fluorescent lamp, and a light-emittingelement such as a light emitting diode (LED) and an organic EL element.Although being provided on a ceiling in FIG. 23A, the lighting device8008 may be installation lighting provided on a wall, a floor, a window,or the like or desktop lighting.

The air-conditioning system 8009 has a function of adjusting an indoorenvironment such as temperature, humidity, and air cleanliness. FIG. 23Aillustrates an air conditioner as an example. The air conditionerincludes an indoor unit in which a compressor, an evaporator, and thelike are integrated and an outdoor unit (not illustrated) in which acondenser is incorporated, or an integral unit thereof.

The electric refrigerator 8010 is an electrical appliance for thestorage of food and the like at low temperature and includes a freezerfor freezing at 0° C. or lower. A refrigerant in a pipe which iscompressed by a compressor absorbs heat when vaporized, and thus insidethe electric refrigerator 8010 is cooled.

The plurality of home appliances may each include a power storage deviceor may use electric power supplied from the power storage system 8005 orthe commercial power supply without including the power storage device.By using a power storage device as an uninterruptible power supply, theplurality of home appliances each including the power storage device canbe used even when electric power cannot be supplied from the commercialpower supply due to power failure or the like.

In the vicinity of a terminal for power supply in each of theabove-described home appliances, an electric power sensor such as acurrent sensor can be provided. Data obtained with the electric powersensor is sent to the control device 8004, which makes it possible forusers to check the used amount of electric power of the whole house. Inaddition, on the basis of the data, the control device 8004 candetermine the distribution of electric power supplied to the pluralityof home appliances, resulting in the efficient or economical use ofelectric power in the house 8000.

In a time zone when the usage rate of electric power which can besupplied from the commercial power supply is low, the power storagesystem 8005 can be charged with electric power from the commercial powersupply. Further, with the use of the solar power generation system 8006,the power storage system 8005 can be charged during the daytime. Notethat an object to be charged is not limited to the power storage system8005, and a power storage device included in the electric vehicle 8012and the power storage devices included in the plurality of homeappliances which are connected to the control device 8004 may each bethe object to be charged.

Electric power stored in a variety of power storage devices in such amanner is efficiently distributed by the control device 8004, resultingin the efficient or economical use of electric power in the house 8000.

As an example of controlling an electric power network, the example ofcontrolling an electric power network on a house scale is describedabove; however, the scale of the electric power network is not limitedthereto. An electric power network on an urban scale or a national scale(also referred to as a smart grid) can be created by a combination of acontrol device such as a smart meter and a communication network.Further, a microgrid which is on a scale of a factory or an office andincludes an energy supply source and a plant consuming electric power asunits can be constructed.

[8.4. Example of Electrical Appliance (Electric Vehicle)]

Next, as an example of the electrical appliances, a moving object isdescribed with reference to FIGS. 23B and 23C. The power storage deviceof one embodiment of the present invention can be used as a powerstorage device for controlling the moving object.

FIG. 23B illustrates an example of a structure inside an electricvehicle. An electric vehicle 8020 includes a power storage device 8024that can be charged and discharged. Output of electric power of thepower storage device 8024 is adjusted by an electronic control unit(ECU) 8025 so that the electric power is supplied to a drive motor unit8027 through an inverter unit 8026. The inverter unit 8026 can convertDC power input from the power storage device 8024 into three phase ACpower, can adjust the voltage, current, and frequency of the convertedAC power, and can output the AC power to the drive motor unit 8027.

Thus, when a driver presses an accelerator pedal (not illustrated), thedrive motor unit 8027 works, so that torque generated in the drive motorunit 8027 is transferred to rear wheels (drive wheels) 8030 through anoutput shaft 8028 and a drive shaft 8029. Front wheels 8023 are operatedfollowing the rear wheels 8030, whereby the electric vehicle 8020 can bedriven.

Sensors such as a voltage sensor, a current sensor, and a temperaturesensor are provided in each of the units to monitor physical values ofeach part of the electric vehicle 8020, as appropriate.

The electronic control unit 8025 is a processing device including amemory such as a RAM or a ROM, and a CPU, which are not illustrated. Theelectronic control unit 8025 outputs a control signal to the inverterunit 8026, the drive motor unit 8027, or the power storage device 8024on the basis of operational information of the electric vehicle 8020(e.g., acceleration, deceleration, or a stop), temperature informationof a driving environment or each unit, control information, or inputdata on the state of charge (SOC) of the power storage device or thelike. Various data and programs are stored in the memory.

As the drive motor unit 8027, a DC motor can be used instead of the ACmotor, or a combination of either of these motors and aninternal-combustion engine can be used.

Note that it is needless to say that one embodiment of the presentinvention is not limited to the moving object described above as long asthe power storage device of one embodiment of the present invention isincluded.

The power storage device 8024 included in the electric vehicle 8020 canbe charged by being supplied with electric power through externalcharging equipment by a plug-in system, a contactless power supplysystem, or the like. FIG. 23C illustrates the state where the powerstorage device 8024 included in the electric vehicle 8020 is chargedwith the use of a ground-based charging apparatus 8021 through a cable8022. In charging, a given method such as CHAdeMO (registered trademark)may be employed as a charging method, the standard of a connector, orthe like as appropriate. The charging apparatus 8021 may be a chargingstation provided in a commerce facility or a power source in a house.For example, with the use of a plug-in technique in which a connectingplug 8031 illustrated in FIG. 23B and connected to the power storagedevice 8024 is electrically connected to the charging apparatus 8021,the power storage device 8024 included in the electric vehicle 8020 canbe charged by being supplied with electric power from outside. The powerstorage device 8024 can be charged by converting external electric powerinto DC constant voltage having a predetermined voltage level through aconverter such as an AC-DC converter.

Further, although not illustrated, a power receiving device may beincluded in the moving object to charge the power storage device bysupplying electric power from an above-ground power transmitting devicein a contactless manner. In the case of the contactless power supplysystem, by fitting the power transmitting device in a road or anexterior wall, charging can be performed not only when the electricvehicle is stopped but also when driven. In addition, the contactlesspower supply system may be utilized to perform transmission/receptionbetween moving objects. Furthermore, a solar cell may be provided in anexterior of the moving object to charge the power storage device 8024when the electric vehicle is stopped or driven. To supply electric powerin such a contactless manner, an electromagnetic induction method or amagnetic resonance method can be used.

Note that in the case where the moving object is an electric railwayvehicle, a power storage device included therein can be charged by beingsupplied with electric power from an overhead cable or a conductor rail.

With the use of the power storage device of one embodiment of thepresent invention as the power storage device 8024, the power storagedevice 8024 can have favorable cycle characteristics and improvedconvenience. When the power storage device 8024 itself can be morecompact and more lightweight as a result of improved characteristics ofthe power storage device 8024, the electric vehicle can be lightweightand fuel efficiency can be increased. Further, the power storage device8024 included in the moving object has relatively large capacity;therefore, the power storage device 8024 can be used as an electricpower supply source for indoor use, for example. In such a case, the useof a commercial power supply can be avoided at peak time of electricpower demand.

[8.5. Example of Electrical Appliance (Portable Information Terminal)]

In addition, as another example of the electrical appliances, a portableinformation terminal is described with reference to FIGS. 24A to 24C.

FIG. 24A is a perspective view illustrating a front surface and a sidesurface of a portable information terminal 8040. The portableinformation terminal 8040 is capable of executing a variety ofapplications such as mobile phone calls, e-mailing, viewing and editingtexts, music reproduction, Internet communication, and a computer game.In the portable information terminal 8040, a housing 8041 includes adisplay portion 8042, a camera lens 8045, a microphone 8046, and aspeaker 8047 on its font surface, a button 8043 for operation on itsleft side, and a connection terminal 8048 on its bottom surface.

A display module or a display panel is used for the display portion8042. Examples of the display module or the display panel are alight-emitting device in which each pixel includes a light-emittingelement typified by an organic light-emitting element (OLED); a liquidcrystal display device; an electronic paper performing a display in anelectrophoretic mode, an electronic liquid powder (registered trademark)mode, or the like; a digital micromirror device (DMD); a plasma displaypanel (PDP); a field emission display (FED); a surface conductionelectron-emitter display (SED); a light-emitting diode (LED) display; acarbon nanotube display; a nanocrystal display; and a quantum dotdisplay.

The portable information terminal 8040 illustrated in FIG. 24A is anexample of providing the one display portion 8042 in the housing 8041;however, one embodiment of the present invention is not limited to thisexample. The display portion 8042 may be provided on a rear surface ofthe portable information terminal 8040. Further, the portableinformation terminal 8040 may be a foldable portable informationterminal in which two or more display portions are provided.

A touch panel with which data can be input by an instruction means suchas a finger or a stylus is provided as an input means on the displayportion 8042. Therefore, icons 8044 displayed on the display portion8042 can be easily operated by the instruction means. Since the touchpanel is provided, a region for a keyboard on the portable informationterminal 8040 is not needed and thus the display portion can be providedin a large region. Further, since data can be input with a finger or astylus, a user-friendly interface can be obtained. Although the touchpanel may be of any of various types such as a resistive type, acapacitive type, an infrared ray type, an electromagnetic inductiontype, and a surface acoustic wave type, the resistive type or thecapacitive type is particularly preferable because the display portion8042 can be curved. Furthermore, such a touch panel may be what iscalled an in-cell touch panel, in which a touch panel is integral withthe display module or the display panel.

The touch panel may also function as an image sensor. In this case, forexample, an image of a palm print, a fingerprint, or the like is takenwith the display portion 8042 touched with the palm or the finger,whereby personal authentication can be performed. Furthermore, with theuse of backlight or a sensing light source emitting near-infrared lightfor the display portion 8042, an image of a finger vein, a palm vein, orthe like can also be taken.

Further, instead of the touch panel, a keyboard may be provided in thedisplay portion 8042. Furthermore, both the touch panel and the keyboardmay be provided.

The button 8043 for operation can have various functions in accordancewith the intended use. For example, the button 8043 may be used as ahome button so that a home screen is displayed on the display portion8042 by pressing the button 8043. Further, the portable informationterminal 8040 may be configured such that main power supply thereof isturned off with a press of the button 8043 for a predetermined time. Astructure may also be employed in which a press of the button 8043brings the portable information terminal 8040 out of a sleep mode.Besides, the button can be used as a switch for starting a variety offunctions, for example, depending on the length of time for pressing orby pressing the button together with another button.

Further, the button 8043 may be used as a volume control button or amute button to have a function of adjusting the volume of the speaker8047 for outputting sound, for example. The speaker 8047 outputs variouskinds of sound, examples of which are sound set for predeterminedprocessing, such as startup sound of an operating system (OS), soundfrom sound files executed in various applications, such as music frommusic reproduction application software, and an incoming e-mail alert.Although not illustrated, a connector for outputting sound to a devicesuch as headphones, earphones, or a headset may be provided togetherwith or instead of the speaker 8047 for outputting sound.

As described above, the button 8043 can have various functions. Althoughthe number of the button 8043 is two in the portable informationterminal 8040 in FIG. 24A, it is needless to say that the number,arrangement, position, or the like of the buttons is not limited to thisexample and can be designed as appropriate.

The microphone 8046 can be used for sound input and recording. Imagesobtained with the use of the camera lens 8045 can be displayed on thedisplay portion 8042.

In addition to the operation with the touch panel provided on thedisplay portion 8042 or the button 8043, the portable informationterminal 8040 can be operated by recognition of user's movement(gesture) (also referred to as gesture input) using the camera lens8045, a sensor provided in the portable information terminal 8040, orthe like. Alternatively, with the use of the microphone 8046, theportable information terminal 8040 can be operated by recognition ofuser's voice (also referred to as voice input). By introducing a naturaluser interface (NUI) technique which enables data to be input to anelectrical appliance by natural behavior of a human, the operationalperformance of the portable information terminal 8040 can be furtherimproved.

The connection terminal 8048 is a terminal for inputting a signal at thetime of communication with an external device or inputting electricpower at the time of power supply. For example, the connection terminal8048 can be used for connecting an external memory drive to the portableinformation terminal 8040. Examples of the external memory drive arestorage medium drives such as an external hard disk drive (HDD), a flashmemory drive, a digital versatile disk (DVD) drive, a DVD-recordable(DVD-R) drive, a DVD-rewritable (DVD-RW) drive, a compact disc (CD)drive, a compact disc recordable (CD-R) drive, a compact disc rewritable(CD-RW) drive, a magneto-optical (MO) disc drive, a floppy disk drive(FDD), and other nonvolatile solid state drive (SSD) devices. Althoughthe portable information terminal 8040 has the touch panel on thedisplay portion 8042, a keyboard may be provided on the housing 8041instead of the touch panel or may be externally added.

Although the number of the connection terminal 8048 is one in theportable information terminal 8040 in FIG. 24A, it is needless to saythat the number, arrangement, position, or the like of the connectionterminals is not limited to this example and can be designed asappropriate.

FIG. 24B is a perspective view illustrating the rear surface and theside surface of the portable information terminal 8040. In the portableinformation terminal 8040, the housing 8041 includes a solar cell 8049and a camera lens 8050 on its rear surface; the portable informationterminal 8040 further includes a charge and discharge control circuit8051, a power storage device 8052, a DC-DC converter 8053, and the like.FIG. 24B illustrates an example where the charge and discharge controlcircuit 8051 includes the power storage device 8052 and the DC-DCconverter 8053. The power storage device of one embodiment of thepresent invention, which is described in the above embodiment, is usedas the power storage device 8052.

The solar cell 8049 attached on the rear surface of the portableinformation terminal 8040 can supply power to the display portion, thetouch panel, a video signal processor, and the like. Note that the solarcell 8049 can be provided on one or both surfaces of the housing 8041.By including the solar cell 8049 in the portable information terminal8040, the power storage device 8052 in the portable information terminal8040 can be charged even in a place where an electric power supply unitis not provided, such as outdoors.

As the solar cell 8049, it is possible to use any of the following: asilicon-based solar cell including a single layer or a stacked layer ofsingle crystal silicon, polycrystalline silicon, microcrystallinesilicon, or amorphous silicon; an InGaAs-based, GaAs-based, CIS-based,Cu₂ZnSnS₄-based, or CdTe—CdS-based solar cell; a dye-sensitized solarcell including an organic dye; an organic thin film solar cell includinga conductive polymer, fullerene, or the like; a quantum dot solar cellhaving a pin structure in which a quantum dot structure is formed in ani-layer with silicon or the like; and the like.

Here, an example of a structure and operation of the charge anddischarge control circuit 8051 illustrated in FIG. 24B is described withreference to a block diagram in FIG. 24C.

FIG. 24C illustrates the solar cell 8049, the power storage device 8052,the DC-DC converter 8053, a converter 8057, a switch 8054, a switch8055, a switch 8056, and the display portion 8042. The power storagedevice 8052, the DC-DC converter 8053, the converter 8057, and theswitches 8054 to 8056 correspond to the charge and discharge controlcircuit 8051 in FIG. 24B.

The voltage of electric power generated by the solar cell 8049 with theuse of external light is raised or lowered by the DC-DC converter 8053to be at a level needed for charging the power storage device 8052. Whenelectric power from the solar cell 8049 is used for the operation of thedisplay portion 8042, the switch 8054 is turned on and the voltage ofthe electric power is raised or lowered by the converter 8057 to avoltage needed for operating the display portion 8042. In addition, whendisplay on the display portion 8042 is not performed, the switch 8054 isturned off and the switch 8055 is turned on so that the power storagedevice 8052 may be charged.

Although the solar cell 8049 is described as an example of a powergeneration means, the power generation means is not particularly limitedthereto, and the power storage device 8052 may be charged by anotherpower generation means such as a piezoelectric element or athermoelectric conversion element (Peltier element). The charging methodof the power storage device 8052 in the portable information terminal8040 is not limited thereto, and the connection terminal 8048 may beconnected to a power supply to perform charge, for example. The powerstorage device 8052 may be charged by a non-contact power transmissionmodule performing charge by transmitting and receiving electric powerwirelessly, or any of the above charging methods may be used incombination.

Here, the state of charge (SOC) of the power storage device 8052 isdisplayed on the upper left corner (in the dashed frame in FIG. 24A) ofthe display portion 8042. Thus, the user can check the state of chargeof the power storage device 8052 and can accordingly select a powersaving mode of the portable information terminal 8040. When the userselects the power saving mode, for example, the button 8043 or the icons8044 can be operated to switch the components of the portableinformation terminal 8040, e.g., the display module or the displaypanel, an arithmetic unit such as CPU, and a memory, to the power savingmode. Specifically, the use is stopped in each of the components and theuse frequency of a given function is decreased. Further, the portableinformation terminal 8040 can be configured to be automatically switchedto the power saving mode depending on the state of charge. Furthermore,by providing a sensor such as an optical sensor in the portableinformation terminal 8040, the amount of external light at the time ofusing the portable information terminal 8040 is sensed to optimizedisplay luminance, which makes it possible to reduce the powerconsumption of the power storage device 8052.

In addition, when charging with the use of the solar cell 8049 or thelike is performed, an image or the like showing that the charging isperformed with the solar cell may be displayed on the upper left corner(in the dashed frame) of the display portion 8042 as illustrated in FIG.24A.

It is needless to say that one embodiment of the present invention isnot limited to the electrical appliance illustrated in FIGS. 24A to 24Cas long as the power storage device of one embodiment of the presentinvention is included.

[8.6. Example of Electrical Appliance (Power Storage System)]

A power storage system will be described as an example of an electricalappliance, with reference to FIG. 25. A power storage system 8100 to bedescribed here can be used at home as the above-described power storagesystem 8005. Here, the power storage system 8100 is described as ahome-use power storage system as an example; however, it is not limitedthereto and can also be used for business use or other uses.

As illustrated in FIG. 25, the power storage system 8100 includes a plug8101 for being electrically connected to a system power supply 8103.Further, the power storage system 8100 is electrically connected to apanelboard 8104 installed in home.

The power storage system 8100 may further include a display panel 8102for displaying an operation state or the like. The display panel mayhave a touch screen. In addition, the power storage system 8100 mayinclude a switch for turning on and off a main power supply, a switch tooperate the power storage system, and the like as well as the displaypanel.

Although not illustrated, an operation switch to operate the powerstorage system 8100 may be provided separately from the power storagesystem 8100; for example, the operation switch may be provided on a wallin a room. Alternatively, the power storage system 8100 may be connectedto a personal computer, a server, or the like provided in home, in orderto be operated indirectly. Still alternatively, the power storage system8100 may be remotely operated using the Internet, an informationterminal such as a smartphone, or the like. In such cases, a mechanismthat performs wired or wireless communication between the power storagesystem 8100 and other devices is provided in the power storage system8100.

The power storage system 8100 includes the plurality of power storageelements illustrated in FIGS. 21A and 21B and a control system, forexample.

The control system has functions of monitoring and controlling states ofthe plurality of power storage elements and protecting the power storageelements. Specifically, the control system collects data of cellvoltages and cell temperatures of the power storage elements, monitorsovercharge and overdischarge, monitors overcurrent, controls a cellbalancer, manages the deterioration condition of a battery, calculatesthe remaining battery level (the state of charge (SOC)), controls acooling fan of a driving power storage device, or controls detection offailure, for example.

Note that a power supply for charging the power storage system 8100 isnot limited to the system power supply 8103 described above; forexample, power may be supplied from a solar power generating systeminstalled outside or a power storage system mounted on an electricvehicle.

This application is based on Japanese Patent Application serial no.2012-287574 filed with Japan Patent Office on Dec. 28, 2012, the entirecontents of which are hereby incorporated by reference.

1. (canceled)
 2. A power storage system comprising: a first power storage element; a second power storage element; a third power storage element; a fourth power storage element; a first switch; a second switch; a third switch; a fourth switch; a fifth switch; a sixth switch; a seventh switch; a eighth switch; a ninth switch; and a tenth switch, wherein each of the first to eighth switches comprises a first transistor and a second transistor, wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor in each of the first to eighth switches, wherein the one of the source and the drain of the first transistor in the first switch is electrically connected to a positive electrode of the first power storage element, wherein the one of the source and the drain of the first transistor in the second switch is electrically connected to a negative electrode of the first power storage element, wherein the one of the source and the drain of the first transistor in the third switch is electrically connected to a positive electrode of the second power storage element, wherein the one of the source and the drain of the first transistor in the fourth switch is electrically connected to a negative electrode of the second power storage element, wherein the one of the source and the drain of the first transistor in the fifth switch is electrically connected to a positive electrode of the third power storage element, wherein the one of the source and the drain of the first transistor in the sixth switch is electrically connected to a negative electrode of the third power storage element, wherein the one of the source and the drain of the first transistor in the seventh switch is electrically connected to a positive electrode of the fourth power storage element, wherein the one of the source and the drain of the first transistor in the eighth switch is electrically connected to a negative electrode of the fourth power storage element, wherein the other of the source and the drain of the first transistor in each of the first switch, the third switch, the fifth switch, and the seventh switch is electrically connected to a first connection terminal, wherein the other of the source and the drain of the first transistor in each of the second switch, the fourth switch, the sixth switch, and the eighth switch is electrically connected to a second connection terminal, wherein the other of the source and the drain of the second transistor in each of the first switch and the third switch is electrically connected to a third connection terminal and a first terminal of the tenth switch, wherein the other of the source and the drain of the second transistor in each of the second switch and the fourth switch is electrically connected to a first terminal of the ninth switch, wherein the other of the source and the drain of the second transistor in each of the fifth switch and the seventh switch is electrically connected to a second terminal of the ninth switch and a second terminal of the tenth switch, wherein the other of the source and the drain of the second transistor in each of the sixth switch and the eighth switch is electrically connected to a fourth connection terminal, wherein the first to tenth switches are controlled so as to switch between serial connection and parallel connection of the first to fourth power storage elements, wherein the first to fourth power storage elements are charged by the parallel connection, and wherein the first to fourth power storage elements are discharged by the serial connection.
 3. The power storage system according to claim 2, wherein each of the first to eighth switches further comprises a third transistor electrically connected in parallel to the first transistor and a fourth transistor electrically connected in parallel to the second transistor, wherein the first transistor and the third transistor have different polarities, and wherein the second transistor and the fourth transistor have different polarities.
 4. The power storage system according to claim 2, wherein the first connection terminal is electrically connected to a first terminal of a power source, wherein the second connection terminal is electrically connected to a second terminal of the power source, wherein the third connection terminal is electrically connected to a first terminal of a load, and wherein the fourth connection terminal is electrically connected to a second terminal of the load.
 5. The power storage system according to claim 2, wherein each of the first transistor and the second transistor comprises an oxide semiconductor in a channel formation region.
 6. An energy management system comprising: the power storage system according to claim 2; an appliance; and a control device connected to the power storage system and the appliance.
 7. A power storage system comprising: a first power storage element; a second power storage element; a first switch; a second switch; a third switch; a fourth switch; a fifth switch; and a sixth switch, wherein each of the first to fourth switches comprises a first transistor and a second transistor, wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor in each of the first to fourth switches, wherein the one of the source and the drain of the first transistor in the first switch is electrically connected to a positive electrode of the first power storage element, wherein the one of the source and the drain of the first transistor in the second switch is electrically connected to a negative electrode of the first power storage element, wherein the one of the source and the drain of the first transistor in the third switch is electrically connected to a positive electrode of the second power storage element, wherein the one of the source and the drain of the first transistor in the fourth switch is electrically connected to a negative electrode of the second power storage element, wherein the other of the source and the drain of the first transistor in each of the first switch and the third switch is electrically connected to a first connection terminal, wherein the other of the source and the drain of the first transistor in each of the second switch and the fourth switch is electrically connected to a second connection terminal, wherein the other of the source and the drain of the second transistor in the first switch is electrically connected to a third connection terminal and a first terminal of the sixth switch, wherein the other of the source and the drain of the second transistor in the second switch is electrically connected to a first terminal of the fifth switch, wherein the other of the source and the drain of the second transistor in the third switch is electrically connected to a second terminal of the fifth switch and a second terminal of the sixth switch, wherein the other of the source and the drain of the second transistor in the fourth switch is electrically connected to a fourth connection terminal, wherein the first to sixth switches are controlled so as to switch between serial connection and parallel connection of the first and second power storage elements, wherein the first and second power storage elements are charged by the parallel connection, and wherein the first and second power storage elements are discharged by the serial connection.
 8. The power storage system according to claim 7, wherein each of the first to fourth switches further comprises a third transistor electrically connected in parallel to the first transistor and a fourth transistor electrically connected in parallel to the second transistor, wherein the first transistor and the third transistor have different polarities, and wherein the second transistor and the fourth transistor have different polarities.
 9. The power storage system according to claim 7, wherein the first connection terminal is electrically connected to a first terminal of a power source, wherein the second connection terminal is electrically connected to a second terminal of the power source, wherein the third connection terminal is electrically connected to a first terminal of a load, and wherein the fourth connection terminal is electrically connected to a second terminal of the load.
 10. The power storage system according to claim 7, wherein each of the first transistor and the second transistor comprises an oxide semiconductor in a channel formation region.
 11. An energy management system comprising: the power storage system according to claim 7; an appliance; and a control device connected to the power storage system and the appliance. 